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[mips] Remove single-precision floating point instruction from multiclass
FFR2P_M. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@170055 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -139,10 +139,9 @@ multiclass FFR1P_M<bits<6> funct, string opstr, SDNode OpNode> {
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multiclass FFR2P_M<bits<6> funct, string opstr, SDNode OpNode, bit isComm = 0> {
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multiclass FFR2P_M<bits<6> funct, string opstr, SDNode OpNode, bit isComm = 0> {
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let isCommutable = isComm in {
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let isCommutable = isComm in {
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def _S : FFR2P<funct, 16, opstr, "s", FGR32, OpNode>;
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def _D32 : FFR2P<funct, 17, opstr, AFGR64, OpNode>,
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def _D32 : FFR2P<funct, 17, opstr, "d", AFGR64, OpNode>,
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Requires<[NotFP64bit, HasStdEnc]>;
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Requires<[NotFP64bit, HasStdEnc]>;
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def _D64 : FFR2P<funct, 17, opstr, "d", FGR64, OpNode>,
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def _D64 : FFR2P<funct, 17, opstr, FGR64, OpNode>,
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Requires<[IsFP64bit, HasStdEnc]> {
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Requires<[IsFP64bit, HasStdEnc]> {
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let DecoderNamespace = "Mips64";
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let DecoderNamespace = "Mips64";
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}
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}
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@ -325,10 +324,14 @@ let Predicates = [HasMips64, HasStdEnc],
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}
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}
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/// Floating-point Aritmetic
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/// Floating-point Aritmetic
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defm FADD : FFR2P_M<0x00, "add", fadd, 1>;
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def FADD_S : FFR2P<0x00, 16, "add.s", FGR32, fadd>, IsCommutable;
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defm FDIV : FFR2P_M<0x03, "div", fdiv>;
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defm FADD : FFR2P_M<0x00, "add.d", fadd, 1>;
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defm FMUL : FFR2P_M<0x02, "mul", fmul, 1>;
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def FDIV_S : FFR2P<0x03, 16, "div.s", FGR32, fdiv>;
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defm FSUB : FFR2P_M<0x01, "sub", fsub>;
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defm FDIV : FFR2P_M<0x03, "div.d", fdiv>;
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def FMUL_S : FFR2P<0x02, 16, "mul.s", FGR32, fmul>, IsCommutable;
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defm FMUL : FFR2P_M<0x02, "mul.d", fmul, 1>;
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def FSUB_S : FFR2P<0x01, 16, "sub.s", FGR32, fsub>;
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defm FSUB : FFR2P_M<0x01, "sub.d", fsub>;
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let Predicates = [HasMips32r2, HasStdEnc] in {
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let Predicates = [HasMips32r2, HasStdEnc] in {
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def MADD_S : FMADDSUB<0x4, 0, "madd", "s", fadd, FGR32>;
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def MADD_S : FMADDSUB<0x4, 0, "madd", "s", fadd, FGR32>;
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@ -333,10 +333,10 @@ class FFR1P<bits<6> funct, bits<5> fmt, string opstr, RegisterClass DstRC,
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let ft = 0;
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let ft = 0;
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}
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}
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class FFR2P<bits<6> funct, bits<5> fmt, string opstr,
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class FFR2P<bits<6> funct, bits<5> fmt, string opstr, RegisterClass RC,
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string fmtstr, RegisterClass RC, SDNode OpNode> :
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SDNode OpNode> :
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FFR<0x11, funct, fmt, (outs RC:$fd), (ins RC:$fs, RC:$ft),
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FFR<0x11, funct, fmt, (outs RC:$fd), (ins RC:$fs, RC:$ft),
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!strconcat(opstr, ".", fmtstr, "\t$fd, $fs, $ft"),
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!strconcat(opstr, "\t$fd, $fs, $ft"),
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[(set RC:$fd, (OpNode RC:$fs, RC:$ft))]>;
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[(set RC:$fd, (OpNode RC:$fs, RC:$ft))]>;
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// Floating point madd/msub/nmadd/nmsub.
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// Floating point madd/msub/nmadd/nmsub.
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