From 627230239477e2cdf6e74d9fb7523b38341b24f6 Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Mon, 23 Jun 2014 18:00:52 +0000 Subject: [PATCH] R600: Select is not expensive. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211518 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/R600/AMDGPUISelLowering.cpp | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/lib/Target/R600/AMDGPUISelLowering.cpp b/lib/Target/R600/AMDGPUISelLowering.cpp index 3bde6e1c8f2..0cfbf6bcf1e 100644 --- a/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/lib/Target/R600/AMDGPUISelLowering.cpp @@ -361,6 +361,9 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(TargetMachine &TM) : setSchedulingPreference(Sched::RegPressure); setJumpIsExpensive(true); + setSelectIsExpensive(false); + PredictableSelectIsExpensive = false; + // There are no integer divide instructions, and these expand to a pretty // large sequence of instructions. setIntDivIsCheap(false); @@ -383,6 +386,10 @@ MVT AMDGPUTargetLowering::getVectorIdxTy() const { return MVT::i32; } +bool AMDGPUTargetLowering::isSelectSupported(SelectSupportKind SelType) const { + return true; +} + // The backend supports 32 and 64 bit floating point immediates. // FIXME: Why are we reporting vectors of FP immediates as legal? bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const {