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Switch all uses of LLVM_OVERRIDE to just use 'override' directly.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@202621 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2014-03-02 09:09:27 +00:00
parent cfbdd4df6d
commit 629b96cb4f
87 changed files with 687 additions and 765 deletions
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lib/CodeGen/MachineScheduler.cpp
+17 -17
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@@ -2454,27 +2454,27 @@ public:
virtual void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) LLVM_OVERRIDE;
unsigned NumRegionInstrs) override;
virtual bool shouldTrackPressure() const LLVM_OVERRIDE {
virtual bool shouldTrackPressure() const override {
return RegionPolicy.ShouldTrackPressure;
}
virtual void initialize(ScheduleDAGMI *dag) LLVM_OVERRIDE;
virtual void initialize(ScheduleDAGMI *dag) override;
virtual SUnit *pickNode(bool &IsTopNode) LLVM_OVERRIDE;
virtual SUnit *pickNode(bool &IsTopNode) override;
virtual void schedNode(SUnit *SU, bool IsTopNode) LLVM_OVERRIDE;
virtual void schedNode(SUnit *SU, bool IsTopNode) override;
virtual void releaseTopNode(SUnit *SU) LLVM_OVERRIDE {
virtual void releaseTopNode(SUnit *SU) override {
Top.releaseTopNode(SU);
}
virtual void releaseBottomNode(SUnit *SU) LLVM_OVERRIDE {
virtual void releaseBottomNode(SUnit *SU) override {
Bot.releaseBottomNode(SU);
}
virtual void registerRoots() LLVM_OVERRIDE;
virtual void registerRoots() override;
protected:
void checkAcyclicLatency();
@@ -3047,14 +3047,14 @@ public:
virtual void initPolicy(MachineBasicBlock::iterator Begin,
MachineBasicBlock::iterator End,
unsigned NumRegionInstrs) LLVM_OVERRIDE {
unsigned NumRegionInstrs) override {
/* no configurable policy */
};
/// PostRA scheduling does not track pressure.
virtual bool shouldTrackPressure() const LLVM_OVERRIDE { return false; }
virtual bool shouldTrackPressure() const override { return false; }
virtual void initialize(ScheduleDAGMI *Dag) LLVM_OVERRIDE {
virtual void initialize(ScheduleDAGMI *Dag) override {
DAG = Dag;
SchedModel = DAG->getSchedModel();
TRI = DAG->TRI;
@@ -3073,22 +3073,22 @@ public:
}
}
virtual void registerRoots() LLVM_OVERRIDE;
virtual void registerRoots() override;
virtual SUnit *pickNode(bool &IsTopNode) LLVM_OVERRIDE;
virtual SUnit *pickNode(bool &IsTopNode) override;
virtual void scheduleTree(unsigned SubtreeID) LLVM_OVERRIDE {
virtual void scheduleTree(unsigned SubtreeID) override {
llvm_unreachable("PostRA scheduler does not support subtree analysis.");
}
virtual void schedNode(SUnit *SU, bool IsTopNode) LLVM_OVERRIDE;
virtual void schedNode(SUnit *SU, bool IsTopNode) override;
virtual void releaseTopNode(SUnit *SU) LLVM_OVERRIDE {
virtual void releaseTopNode(SUnit *SU) override {
Top.releaseTopNode(SU);
}
// Only called for roots.
virtual void releaseBottomNode(SUnit *SU) LLVM_OVERRIDE {
virtual void releaseBottomNode(SUnit *SU) override {
BotRoots.push_back(SU);
}