From 62a69eee5ad951502de28871ef27bb64dbf5508f Mon Sep 17 00:00:00 2001 From: Matheus Almeida Date: Fri, 11 Oct 2013 13:39:49 +0000 Subject: [PATCH] [mips][msa] Direct Object Emission for the majority of the ELM instructions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192449 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/Mips/MipsMSAInstrFormats.td | 67 +++++++++++++++++++++++ lib/Target/Mips/MipsMSAInstrInfo.td | 73 +++++++++++++++----------- test/MC/Mips/msa/test_elm.s | 48 +++++++++++++++++ 3 files changed, 157 insertions(+), 31 deletions(-) create mode 100644 test/MC/Mips/msa/test_elm.s diff --git a/lib/Target/Mips/MipsMSAInstrFormats.td b/lib/Target/Mips/MipsMSAInstrFormats.td index 579e6e3ad17..502bc6b681f 100644 --- a/lib/Target/Mips/MipsMSAInstrFormats.td +++ b/lib/Target/Mips/MipsMSAInstrFormats.td @@ -110,26 +110,93 @@ class MSA_ELM_FMT major, bits<6> minor>: MSAInst { } class MSA_ELM_B_FMT major, bits<6> minor>: MSAInst { + bits<4> n; + bits<5> ws; + bits<5> wd; + let Inst{25-22} = major; let Inst{21-20} = 0b00; + let Inst{19-16} = n{3-0}; + let Inst{15-11} = ws; + let Inst{10-6} = wd; let Inst{5-0} = minor; } class MSA_ELM_H_FMT major, bits<6> minor>: MSAInst { + bits<4> n; + bits<5> ws; + bits<5> wd; + let Inst{25-22} = major; let Inst{21-19} = 0b100; + let Inst{18-16} = n{2-0}; + let Inst{15-11} = ws; + let Inst{10-6} = wd; let Inst{5-0} = minor; } class MSA_ELM_W_FMT major, bits<6> minor>: MSAInst { + bits<4> n; + bits<5> ws; + bits<5> wd; + let Inst{25-22} = major; let Inst{21-18} = 0b1100; + let Inst{17-16} = n{1-0}; + let Inst{15-11} = ws; + let Inst{10-6} = wd; let Inst{5-0} = minor; } class MSA_ELM_D_FMT major, bits<6> minor>: MSAInst { + bits<4> n; + bits<5> ws; + bits<5> wd; + let Inst{25-22} = major; let Inst{21-17} = 0b11100; + let Inst{16} = n{0}; + let Inst{15-11} = ws; + let Inst{10-6} = wd; + let Inst{5-0} = minor; +} + +class MSA_ELM_COPY_B_FMT major, bits<6> minor>: MSAInst { + bits<4> n; + bits<5> ws; + bits<5> rd; + + let Inst{25-22} = major; + let Inst{21-20} = 0b00; + let Inst{19-16} = n{3-0}; + let Inst{15-11} = ws; + let Inst{10-6} = rd; + let Inst{5-0} = minor; +} + +class MSA_ELM_COPY_H_FMT major, bits<6> minor>: MSAInst { + bits<4> n; + bits<5> ws; + bits<5> rd; + + let Inst{25-22} = major; + let Inst{21-19} = 0b100; + let Inst{18-16} = n{2-0}; + let Inst{15-11} = ws; + let Inst{10-6} = rd; + let Inst{5-0} = minor; +} + +class MSA_ELM_COPY_W_FMT major, bits<6> minor>: MSAInst { + bits<4> n; + bits<5> ws; + bits<5> rd; + + let Inst{25-22} = major; + let Inst{21-18} = 0b1100; + let Inst{17-16} = n{1-0}; + let Inst{15-11} = ws; + let Inst{10-6} = rd; let Inst{5-0} = minor; } diff --git a/lib/Target/Mips/MipsMSAInstrInfo.td b/lib/Target/Mips/MipsMSAInstrInfo.td index f16977dde53..e5f69e542ad 100644 --- a/lib/Target/Mips/MipsMSAInstrInfo.td +++ b/lib/Target/Mips/MipsMSAInstrInfo.td @@ -501,13 +501,13 @@ class CLTI_U_H_ENC : MSA_I5_FMT<0b011, 0b01, 0b000111>; class CLTI_U_W_ENC : MSA_I5_FMT<0b011, 0b10, 0b000111>; class CLTI_U_D_ENC : MSA_I5_FMT<0b011, 0b11, 0b000111>; -class COPY_S_B_ENC : MSA_ELM_B_FMT<0b0010, 0b011001>; -class COPY_S_H_ENC : MSA_ELM_H_FMT<0b0010, 0b011001>; -class COPY_S_W_ENC : MSA_ELM_W_FMT<0b0010, 0b011001>; +class COPY_S_B_ENC : MSA_ELM_COPY_B_FMT<0b0010, 0b011001>; +class COPY_S_H_ENC : MSA_ELM_COPY_H_FMT<0b0010, 0b011001>; +class COPY_S_W_ENC : MSA_ELM_COPY_W_FMT<0b0010, 0b011001>; -class COPY_U_B_ENC : MSA_ELM_B_FMT<0b0011, 0b011001>; -class COPY_U_H_ENC : MSA_ELM_H_FMT<0b0011, 0b011001>; -class COPY_U_W_ENC : MSA_ELM_W_FMT<0b0011, 0b011001>; +class COPY_U_B_ENC : MSA_ELM_COPY_B_FMT<0b0011, 0b011001>; +class COPY_U_H_ENC : MSA_ELM_COPY_H_FMT<0b0011, 0b011001>; +class COPY_U_W_ENC : MSA_ELM_COPY_W_FMT<0b0011, 0b011001>; class CTCMSA_ENC : MSA_ELM_FMT<0b0000111110, 0b011001>; @@ -1076,12 +1076,23 @@ class MSA_BIT_SPLAT_DESC_BASE { - dag OutOperandList = (outs RCD:$rd); - dag InOperandList = (ins RCWS:$ws, uimm4:$n); + dag OutOperandList = (outs ROD:$rd); + dag InOperandList = (ins ROWS:$ws, uimm4:$n); string AsmString = !strconcat(instr_asm, "\t$rd, $ws[$n]"); - list Pattern = [(set RCD:$rd, (OpNode (VecTy RCWS:$ws), immZExt4:$n))]; + list Pattern = [(set ROD:$rd, (OpNode (VecTy ROWS:$ws), immZExt4:$n))]; + InstrItinClass Itinerary = itin; +} + +class MSA_ELM_DESC_BASE { + dag OutOperandList = (outs ROWD:$wd); + dag InOperandList = (ins ROWS:$ws, uimm4:$n); + string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); + list Pattern = [(set ROWD:$wd, (OpNode ROWS:$ws, immZExt4:$n))]; InstrItinClass Itinerary = itin; } @@ -1285,14 +1296,14 @@ class MSA_VEC_DESC_BASE { - dag OutOperandList = (outs RCWD:$wd); - dag InOperandList = (ins RCWS:$ws, SplatImm.OpClass:$u3); - string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$u3]"); - list Pattern = [(set RCWD:$wd, (MipsVSHF SplatImm:$u3, RCWS:$ws, - RCWS:$ws))]; + dag OutOperandList = (outs ROWD:$wd); + dag InOperandList = (ins ROWS:$ws, SplatImm.OpClass:$n); + string AsmString = !strconcat(instr_asm, "\t$wd, $ws[$n]"); + list Pattern = [(set ROWD:$wd, (MipsVSHF SplatImm:$n, ROWS:$ws, + ROWS:$ws))]; InstrItinClass Itinerary = itin; } @@ -1600,18 +1611,18 @@ class CLTI_U_D_DESC : MSA_I5_DESC_BASE<"clti_u.d", vsetult_v2i64, vsplati64_uimm5, MSA128DOpnd>; class COPY_S_B_DESC : MSA_COPY_DESC_BASE<"copy_s.b", vextract_sext_i8, v16i8, - GPR32, MSA128B>; + GPR32Opnd, MSA128BOpnd>; class COPY_S_H_DESC : MSA_COPY_DESC_BASE<"copy_s.h", vextract_sext_i16, v8i16, - GPR32, MSA128H>; + GPR32Opnd, MSA128HOpnd>; class COPY_S_W_DESC : MSA_COPY_DESC_BASE<"copy_s.w", vextract_sext_i32, v4i32, - GPR32, MSA128W>; + GPR32Opnd, MSA128WOpnd>; class COPY_U_B_DESC : MSA_COPY_DESC_BASE<"copy_u.b", vextract_zext_i8, v16i8, - GPR32, MSA128B>; + GPR32Opnd, MSA128BOpnd>; class COPY_U_H_DESC : MSA_COPY_DESC_BASE<"copy_u.h", vextract_zext_i16, v8i16, - GPR32, MSA128H>; + GPR32Opnd, MSA128HOpnd>; class COPY_U_W_DESC : MSA_COPY_DESC_BASE<"copy_u.w", vextract_zext_i32, v4i32, - GPR32, MSA128W>; + GPR32Opnd, MSA128WOpnd>; class COPY_FW_PSEUDO_DESC : MSA_COPY_PSEUDO_BASE; @@ -2206,10 +2217,10 @@ class SLD_H_DESC : MSA_3R_DESC_BASE<"sld.h", int_mips_sld_h, MSA128HOpnd>; class SLD_W_DESC : MSA_3R_DESC_BASE<"sld.w", int_mips_sld_w, MSA128WOpnd>; class SLD_D_DESC : MSA_3R_DESC_BASE<"sld.d", int_mips_sld_d, MSA128DOpnd>; -class SLDI_B_DESC : MSA_BIT_B_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128B>; -class SLDI_H_DESC : MSA_BIT_H_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128H>; -class SLDI_W_DESC : MSA_BIT_W_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128W>; -class SLDI_D_DESC : MSA_BIT_D_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128D>; +class SLDI_B_DESC : MSA_ELM_DESC_BASE<"sldi.b", int_mips_sldi_b, MSA128BOpnd>; +class SLDI_H_DESC : MSA_ELM_DESC_BASE<"sldi.h", int_mips_sldi_h, MSA128HOpnd>; +class SLDI_W_DESC : MSA_ELM_DESC_BASE<"sldi.w", int_mips_sldi_w, MSA128WOpnd>; +class SLDI_D_DESC : MSA_ELM_DESC_BASE<"sldi.d", int_mips_sldi_d, MSA128DOpnd>; class SLL_B_DESC : MSA_3R_DESC_BASE<"sll.b", shl, MSA128BOpnd>; class SLL_H_DESC : MSA_3R_DESC_BASE<"sll.h", shl, MSA128HOpnd>; @@ -2235,13 +2246,13 @@ class SPLAT_D_DESC : MSA_3R_DESC_BASE<"splat.d", int_mips_splat_d, MSA128DOpnd, MSA128DOpnd, GPR32Opnd>; class SPLATI_B_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.b", vsplati8_uimm4, - MSA128B>; + MSA128BOpnd>; class SPLATI_H_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.h", vsplati16_uimm3, - MSA128H>; + MSA128HOpnd>; class SPLATI_W_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.w", vsplati32_uimm2, - MSA128W>; + MSA128WOpnd>; class SPLATI_D_DESC : MSA_ELM_SPLAT_DESC_BASE<"splati.d", vsplati64_uimm1, - MSA128D>; + MSA128DOpnd>; class SRA_B_DESC : MSA_3R_DESC_BASE<"sra.b", sra, MSA128BOpnd>; class SRA_H_DESC : MSA_3R_DESC_BASE<"sra.h", sra, MSA128HOpnd>; diff --git a/test/MC/Mips/msa/test_elm.s b/test/MC/Mips/msa/test_elm.s new file mode 100644 index 00000000000..6b467077305 --- /dev/null +++ b/test/MC/Mips/msa/test_elm.s @@ -0,0 +1,48 @@ +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -show-encoding -mcpu=mips32r2 -mattr=+msa -arch=mips | FileCheck %s +# +# RUN: llvm-mc %s -triple=mipsel-unknown-linux -mcpu=mips32r2 -mattr=+msa -arch=mips -filetype=obj -o - | llvm-objdump -d -triple=mipsel-unknown-linux -mattr=+msa -arch=mips - | FileCheck %s -check-prefix=CHECKOBJDUMP +# +# CHECK: copy_s.b $13, $w8[2] # encoding: [0x78,0x82,0x43,0x59] +# CHECK: copy_s.h $1, $w25[0] # encoding: [0x78,0xa0,0xc8,0x59] +# CHECK: copy_s.w $22, $w5[1] # encoding: [0x78,0xb1,0x2d,0x99] +# CHECK: copy_u.b $22, $w20[4] # encoding: [0x78,0xc4,0xa5,0x99] +# CHECK: copy_u.h $20, $w4[0] # encoding: [0x78,0xe0,0x25,0x19] +# CHECK: copy_u.w $fp, $w13[2] # encoding: [0x78,0xf2,0x6f,0x99] +# CHECK: sldi.b $w0, $w29[4] # encoding: [0x78,0x04,0xe8,0x19] +# CHECK: sldi.h $w8, $w17[0] # encoding: [0x78,0x20,0x8a,0x19] +# CHECK: sldi.w $w20, $w27[2] # encoding: [0x78,0x32,0xdd,0x19] +# CHECK: sldi.d $w4, $w12[0] # encoding: [0x78,0x38,0x61,0x19] +# CHECK: splati.b $w25, $w3[2] # encoding: [0x78,0x42,0x1e,0x59] +# CHECK: splati.h $w24, $w28[1] # encoding: [0x78,0x61,0xe6,0x19] +# CHECK: splati.w $w13, $w18[0] # encoding: [0x78,0x70,0x93,0x59] +# CHECK: splati.d $w28, $w1[0] # encoding: [0x78,0x78,0x0f,0x19] + +# CHECKOBJDUMP: copy_s.b $13, $w8[2] +# CHECKOBJDUMP: copy_s.h $1, $w25[0] +# CHECKOBJDUMP: copy_s.w $22, $w5[1] +# CHECKOBJDUMP: copy_u.b $22, $w20[4] +# CHECKOBJDUMP: copy_u.h $20, $w4[0] +# CHECKOBJDUMP: copy_u.w $fp, $w13[2] +# CHECKOBJDUMP: sldi.b $w0, $w29[4] +# CHECKOBJDUMP: sldi.h $w8, $w17[0] +# CHECKOBJDUMP: sldi.w $w20, $w27[2] +# CHECKOBJDUMP: sldi.d $w4, $w12[0] +# CHECKOBJDUMP: splati.b $w25, $w3[2] +# CHECKOBJDUMP: splati.h $w24, $w28[1] +# CHECKOBJDUMP: splati.w $w13, $w18[0] +# CHECKOBJDUMP: splati.d $w28, $w1[0] + + copy_s.b $13, $w8[2] + copy_s.h $1, $w25[0] + copy_s.w $22, $w5[1] + copy_u.b $22, $w20[4] + copy_u.h $20, $w4[0] + copy_u.w $30, $w13[2] + sldi.b $w0, $w29[4] + sldi.h $w8, $w17[0] + sldi.w $w20, $w27[2] + sldi.d $w4, $w12[0] + splati.b $w25, $w3[2] + splati.h $w24, $w28[1] + splati.w $w13, $w18[0] + splati.d $w28, $w1[0]