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Add AVX compare packed instructions
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@106600 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Bruno Cardoso Lopes
parent
dd2fa4bbea
commit
62a76c6401
@ -240,6 +240,18 @@ class PI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern,
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let AsmString = !if(hasVEXPrefix, !strconcat("v", asm), asm);
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}
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// PIi8 - SSE 1 & 2 packed instructions with immediate
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class PIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
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list<dag> pattern, Domain d>
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: Ii8<o, F, outs, ins, asm, pattern, d> {
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let Predicates = !if(hasVEX_4VPrefix /* VEX_4V */,
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!if(hasOpSizePrefix /* OpSize */, [HasAVX, HasSSE2], [HasAVX, HasSSE1]),
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!if(hasOpSizePrefix /* OpSize */, [HasSSE2], [HasSSE1]));
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// AVX instructions have a 'v' prefix in the mnemonic
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let AsmString = !if(hasVEX_4VPrefix, !strconcat("v", asm), asm);
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}
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// SSE1 Instruction Templates:
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//
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// SSI - SSE1 instructions with XS prefix.
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@ -460,6 +460,27 @@ multiclass sse12_unpack_interleave<bits<8> opc, PatFrag OpNode, ValueType vt,
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(mem_frag addr:$src2))))], d>;
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}
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multiclass sse12_cmp<RegisterClass RC, X86MemOperand x86memop, Intrinsic Int,
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string asm, Domain d, Operand sse_imm_op> {
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def rri : PIi8<0xC2, MRMSrcReg,
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(outs RC:$dst), (ins RC:$src1, RC:$src, sse_imm_op:$cc), asm,
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[(set RC:$dst, (Int RC:$src1, RC:$src, imm:$cc))], d>;
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def rmi : PIi8<0xC2, MRMSrcMem,
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(outs RC:$dst), (ins RC:$src1, f128mem:$src, sse_imm_op:$cc), asm,
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[(set RC:$dst, (Int RC:$src1, (memop addr:$src), imm:$cc))], d>;
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}
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// FIXME: rename instructions to only use the class above
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multiclass sse12_cmp_alt<RegisterClass RC, string asm, Domain d,
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Operand sse_imm_op> {
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def rri_alt : PIi8<0xC2, MRMSrcReg,
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(outs RC:$dst), (ins RC:$src1, RC:$src, sse_imm_op:$src2), asm,
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[], d>;
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def rmi_alt : PIi8<0xC2, MRMSrcMem,
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(outs RC:$dst), (ins RC:$src1, f128mem:$src, sse_imm_op:$src2), asm,
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[], d>;
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}
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//===----------------------------------------------------------------------===//
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// SSE1 Instructions
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//===----------------------------------------------------------------------===//
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@ -1327,44 +1348,42 @@ defm RSQRT : sse1_fp_unop_rm<0x52, "rsqrt", X86frsqrt,
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defm RCP : sse1_fp_unop_rm<0x53, "rcp", X86frcp,
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int_x86_sse_rcp_ss, int_x86_sse_rcp_ps>;
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// Compare
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let Constraints = "$src1 = $dst" in {
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def CMPPSrri : PSIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}ps\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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VR128:$src, imm:$cc))]>;
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def CMPPSrmi : PSIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}ps\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse_cmp_ps VR128:$src1,
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(memop addr:$src), imm:$cc))]>;
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def CMPPDrri : PDIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc),
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"cmp${cc}pd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1,
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VR128:$src, imm:$cc))]>;
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def CMPPDrmi : PDIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, SSECC:$cc),
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"cmp${cc}pd\t{$src, $dst|$dst, $src}",
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[(set VR128:$dst, (int_x86_sse2_cmp_pd VR128:$src1,
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(memop addr:$src), imm:$cc))]>;
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// Accept explicit immediate argument form instead of comparison code.
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defm CMPPS : sse12_cmp<VR128, f128mem, int_x86_sse_cmp_ps,
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"cmp${cc}ps\t{$src, $dst|$dst, $src}", SSEPackedSingle, SSECC>,
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TB;
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defm CMPPD : sse12_cmp<VR128, f128mem, int_x86_sse2_cmp_pd,
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"cmp${cc}pd\t{$src, $dst|$dst, $src}", SSEPackedDouble, SSECC>,
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TB, OpSize;
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}
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let isAsmParserOnly = 1 in {
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def CMPPSrri_alt : PSIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src, i8imm:$src2),
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"cmpps\t{$src2, $src, $dst|$dst, $src, $src}", []>;
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def CMPPSrmi_alt : PSIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, i8imm:$src2),
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"cmpps\t{$src2, $src, $dst|$dst, $src, $src}", []>;
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def CMPPDrri_alt : PDIi8<0xC2, MRMSrcReg,
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(outs VR128:$dst), (ins VR128:$src1, VR128:$src, i8imm:$src2),
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"cmppd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
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def CMPPDrmi_alt : PDIi8<0xC2, MRMSrcMem,
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(outs VR128:$dst), (ins VR128:$src1, f128mem:$src, i8imm:$src2),
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"cmppd\t{$src2, $src, $dst|$dst, $src, $src2}", []>;
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defm VCMPPS : sse12_cmp<VR128, f128mem, int_x86_sse_cmp_ps,
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"cmp${cc}ps\t{$src, $src1, $dst|$dst, $src1, $src}",
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SSEPackedSingle, SSECC>, VEX_4V;
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defm VCMPPD : sse12_cmp<VR128, f128mem, int_x86_sse2_cmp_pd,
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"cmp${cc}pd\t{$src, $src1, $dst|$dst, $src1, $src}",
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SSEPackedSingle, SSECC>, OpSize, VEX_4V;
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}
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let isAsmParserOnly = 1, Pattern = []<dag> in {
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// Accept explicit immediate argument form instead of comparison code.
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let Constraints = "$src1 = $dst" in {
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defm CMPPS : sse12_cmp_alt<VR128,
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"cmpps\t{$src2, $src, $dst|$dst, $src, $src2}",
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SSEPackedSingle, i8imm>, TB;
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defm CMPPD : sse12_cmp_alt<VR128,
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"cmppd\t{$src2, $src, $dst|$dst, $src, $src2}",
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SSEPackedDouble, i8imm>, TB, OpSize;
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}
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defm VCMPPS : sse12_cmp_alt<VR128,
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"cmpps\t{$src2, $src, $src1, $dst|$dst, $src1, $src, $src}",
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SSEPackedSingle, i8imm>, VEX_4V;
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defm VCMPPD : sse12_cmp_alt<VR128,
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"cmppd\t{$src2, $src, $src1, $dst|$dst, $src1, $src, $src2}",
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SSEPackedSingle, i8imm>, OpSize, VEX_4V;
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}
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def : Pat<(v4i32 (X86cmpps (v4f32 VR128:$src1), VR128:$src2, imm:$cc)),
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(CMPPSrri (v4f32 VR128:$src1), (v4f32 VR128:$src2), imm:$cc)>;
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def : Pat<(v4i32 (X86cmpps (v4f32 VR128:$src1), (memop addr:$src2), imm:$cc)),
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@ -10350,3 +10350,27 @@
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// CHECK: encoding: [0xc5,0xe9,0x14,0x6c,0xcb,0xfc]
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vunpcklpd -4(%ebx,%ecx,8), %xmm2, %xmm5
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// CHECK: vcmpps $0, %xmm0, %xmm6, %xmm1
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// CHECK: encoding: [0xc5,0xc8,0xc2,0xc8,0x00]
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vcmpps $0, %xmm0, %xmm6, %xmm1
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// CHECK: vcmpps $0, (%eax), %xmm6, %xmm1
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// CHECK: encoding: [0xc5,0xc8,0xc2,0x08,0x00]
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vcmpps $0, (%eax), %xmm6, %xmm1
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// CHECK: vcmpps $7, %xmm0, %xmm6, %xmm1
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// CHECK: encoding: [0xc5,0xc8,0xc2,0xc8,0x07]
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vcmpps $7, %xmm0, %xmm6, %xmm1
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// CHECK: vcmppd $0, %xmm0, %xmm6, %xmm1
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// CHECK: encoding: [0xc5,0xc9,0xc2,0xc8,0x00]
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vcmppd $0, %xmm0, %xmm6, %xmm1
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// CHECK: vcmppd $0, (%eax), %xmm6, %xmm1
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// CHECK: encoding: [0xc5,0xc9,0xc2,0x08,0x00]
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vcmppd $0, (%eax), %xmm6, %xmm1
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// CHECK: vcmppd $7, %xmm0, %xmm6, %xmm1
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// CHECK: encoding: [0xc5,0xc9,0xc2,0xc8,0x07]
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vcmppd $7, %xmm0, %xmm6, %xmm1
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@ -414,3 +414,27 @@ pshufb CPI1_0(%rip), %xmm1
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// CHECK: encoding: [0xc5,0x19,0x14,0x7c,0xcb,0xfc]
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vunpcklpd -4(%rbx,%rcx,8), %xmm12, %xmm15
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// CHECK: vcmpps $0, %xmm10, %xmm12, %xmm15
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// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xfa,0x00]
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vcmpps $0, %xmm10, %xmm12, %xmm15
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// CHECK: vcmpps $0, (%rax), %xmm12, %xmm15
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// CHECK: encoding: [0xc5,0x18,0xc2,0x38,0x00]
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vcmpps $0, (%rax), %xmm12, %xmm15
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// CHECK: vcmpps $7, %xmm10, %xmm12, %xmm15
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// CHECK: encoding: [0xc4,0x41,0x18,0xc2,0xfa,0x07]
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vcmpps $7, %xmm10, %xmm12, %xmm15
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// CHECK: vcmppd $0, %xmm10, %xmm12, %xmm15
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// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xfa,0x00]
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vcmppd $0, %xmm10, %xmm12, %xmm15
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// CHECK: vcmppd $0, (%rax), %xmm12, %xmm15
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// CHECK: encoding: [0xc5,0x19,0xc2,0x38,0x00]
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vcmppd $0, (%rax), %xmm12, %xmm15
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// CHECK: vcmppd $7, %xmm10, %xmm12, %xmm15
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// CHECK: encoding: [0xc4,0x41,0x19,0xc2,0xfa,0x07]
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vcmppd $7, %xmm10, %xmm12, %xmm15
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