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Simplify logic now that r182490 is in place. No functional change intended.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182531 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chad Rosier
2013-05-22 23:17:36 +00:00
parent b018bab0b8
commit 62c320a755
11 changed files with 46 additions and 50 deletions
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8
lib/Target/ARM/Thumb2ITBlockPass.cpp
View File

@@ -73,15 +73,15 @@ static void TrackDefUses(MachineInstr *MI,
for (unsigned i = 0, e = LocalUses.size(); i != e; ++i) {
unsigned Reg = LocalUses[i];
Uses.insert(Reg);
for (MCSubRegIterator Subreg(Reg, TRI); Subreg.isValid(); ++Subreg)
for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
Subreg.isValid(); ++Subreg)
Uses.insert(*Subreg);
}
for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) {
unsigned Reg = LocalDefs[i];
Defs.insert(Reg);
for (MCSubRegIterator Subreg(Reg, TRI); Subreg.isValid(); ++Subreg)
for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
Subreg.isValid(); ++Subreg)
Defs.insert(*Subreg);
if (Reg == ARM::CPSR)
continue;

16
lib/Target/X86/X86RegisterInfo.cpp
View File

@@ -306,19 +306,19 @@ BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
const TargetFrameLowering *TFI = MF.getTarget().getFrameLowering();
// Set the stack-pointer register and its aliases as reserved.
Reserved.set(X86::RSP);
for (MCSubRegIterator I(X86::RSP, this); I.isValid(); ++I)
for (MCSubRegIterator I(X86::RSP, this, /*IncludeSelf=*/true); I.isValid();
++I)
Reserved.set(*I);
// Set the instruction pointer register and its aliases as reserved.
Reserved.set(X86::RIP);
for (MCSubRegIterator I(X86::RIP, this); I.isValid(); ++I)
for (MCSubRegIterator I(X86::RIP, this, /*IncludeSelf=*/true); I.isValid();
++I)
Reserved.set(*I);
// Set the frame-pointer register and its aliases as reserved if needed.
if (TFI->hasFP(MF)) {
Reserved.set(X86::RBP);
for (MCSubRegIterator I(X86::RBP, this); I.isValid(); ++I)
for (MCSubRegIterator I(X86::RBP, this, /*IncludeSelf=*/true); I.isValid();
++I)
Reserved.set(*I);
}
@@ -331,8 +331,8 @@ BitVector X86RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
"Stack realignment in presence of dynamic allocas is not supported with"
"this calling convention.");
Reserved.set(getBaseRegister());
for (MCSubRegIterator I(getBaseRegister(), this); I.isValid(); ++I)
for (MCSubRegIterator I(getBaseRegister(), this, /*IncludeSelf=*/true);
I.isValid(); ++I)
Reserved.set(*I);
}