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mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-03-31 11:32:42 +00:00

Add missing mayLoad / mayStore flags to instruction definitions without patterns,

which fixes all of the CodeGen/MBlaze verifier failures.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@131595 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Cameron Zwarich 2011-05-18 23:03:10 +00:00
parent f0542c07f7
commit 631fcbf810

@ -245,20 +245,25 @@ class PatCmp<bits<6> op, bits<11> flags, string instr_asm> :
//===----------------------------------------------------------------------===//
// Memory Access Instructions
//===----------------------------------------------------------------------===//
let mayLoad = 1 in {
class LoadM<bits<6> op, bits<11> flags, string instr_asm> :
TA<op, flags, (outs GPR:$dst), (ins memrr:$addr),
!strconcat(instr_asm, " $dst, $addr"),
[], IIC_MEMl>;
}
class LoadMI<bits<6> op, string instr_asm, PatFrag OpNode> :
TB<op, (outs GPR:$dst), (ins memri:$addr),
!strconcat(instr_asm, " $dst, $addr"),
[(set (i32 GPR:$dst), (OpNode iaddr:$addr))], IIC_MEMl>;
let mayStore = 1 in {
class StoreM<bits<6> op, bits<11> flags, string instr_asm> :
TA<op, flags, (outs), (ins GPR:$dst, memrr:$addr),
!strconcat(instr_asm, " $dst, $addr"),
[], IIC_MEMs>;
}
class StoreMI<bits<6> op, string instr_asm, PatFrag OpNode> :
TB<op, (outs), (ins GPR:$dst, memri:$addr),