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Fix PR1872: SrcValue and SrcValueOffset should not be used to compute load / store node id.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45167 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -372,8 +372,6 @@ static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) {
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ID.AddInteger(LD->getAddressingMode());
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ID.AddInteger(LD->getExtensionType());
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ID.AddInteger((unsigned int)(LD->getLoadedVT()));
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ID.AddPointer(LD->getSrcValue());
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ID.AddInteger(LD->getSrcValueOffset());
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ID.AddInteger(LD->getAlignment());
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ID.AddInteger(LD->isVolatile());
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break;
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@ -383,8 +381,6 @@ static void AddNodeIDNode(FoldingSetNodeID &ID, SDNode *N) {
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ID.AddInteger(ST->getAddressingMode());
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ID.AddInteger(ST->isTruncatingStore());
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ID.AddInteger((unsigned int)(ST->getStoredVT()));
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ID.AddPointer(ST->getSrcValue());
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ID.AddInteger(ST->getSrcValueOffset());
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ID.AddInteger(ST->getAlignment());
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ID.AddInteger(ST->isVolatile());
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break;
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@ -639,16 +635,12 @@ SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
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ID.AddInteger(LD->getAddressingMode());
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ID.AddInteger(LD->getExtensionType());
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ID.AddInteger((unsigned int)(LD->getLoadedVT()));
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ID.AddPointer(LD->getSrcValue());
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ID.AddInteger(LD->getSrcValueOffset());
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ID.AddInteger(LD->getAlignment());
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ID.AddInteger(LD->isVolatile());
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} else if (const StoreSDNode *ST = dyn_cast<StoreSDNode>(N)) {
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ID.AddInteger(ST->getAddressingMode());
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ID.AddInteger(ST->isTruncatingStore());
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ID.AddInteger((unsigned int)(ST->getStoredVT()));
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ID.AddPointer(ST->getSrcValue());
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ID.AddInteger(ST->getSrcValueOffset());
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ID.AddInteger(ST->getAlignment());
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ID.AddInteger(ST->isVolatile());
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}
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@ -2330,8 +2322,6 @@ SDOperand SelectionDAG::getLoad(MVT::ValueType VT,
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ID.AddInteger(ISD::UNINDEXED);
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ID.AddInteger(ISD::NON_EXTLOAD);
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ID.AddInteger((unsigned int)VT);
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ID.AddPointer(SV);
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ID.AddInteger(SVOffset);
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ID.AddInteger(Alignment);
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ID.AddInteger(isVolatile);
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void *IP = 0;
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@ -2385,8 +2375,6 @@ SDOperand SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, MVT::ValueType VT,
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ID.AddInteger(ISD::UNINDEXED);
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ID.AddInteger(ExtType);
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ID.AddInteger((unsigned int)EVT);
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ID.AddPointer(SV);
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ID.AddInteger(SVOffset);
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ID.AddInteger(Alignment);
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ID.AddInteger(isVolatile);
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void *IP = 0;
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@ -2413,8 +2401,6 @@ SelectionDAG::getIndexedLoad(SDOperand OrigLoad, SDOperand Base,
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ID.AddInteger(AM);
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ID.AddInteger(LD->getExtensionType());
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ID.AddInteger((unsigned int)(LD->getLoadedVT()));
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ID.AddPointer(LD->getSrcValue());
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ID.AddInteger(LD->getSrcValueOffset());
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ID.AddInteger(LD->getAlignment());
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ID.AddInteger(LD->isVolatile());
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void *IP = 0;
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@ -2454,8 +2440,6 @@ SDOperand SelectionDAG::getStore(SDOperand Chain, SDOperand Val,
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ID.AddInteger(ISD::UNINDEXED);
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ID.AddInteger(false);
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ID.AddInteger((unsigned int)VT);
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ID.AddPointer(SV);
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ID.AddInteger(SVOffset);
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ID.AddInteger(Alignment);
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ID.AddInteger(isVolatile);
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void *IP = 0;
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@ -2502,8 +2486,6 @@ SDOperand SelectionDAG::getTruncStore(SDOperand Chain, SDOperand Val,
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ID.AddInteger(ISD::UNINDEXED);
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ID.AddInteger(1);
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ID.AddInteger((unsigned int)SVT);
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ID.AddPointer(SV);
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ID.AddInteger(SVOffset);
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ID.AddInteger(Alignment);
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ID.AddInteger(isVolatile);
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void *IP = 0;
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@ -2529,8 +2511,6 @@ SelectionDAG::getIndexedStore(SDOperand OrigStore, SDOperand Base,
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ID.AddInteger(AM);
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ID.AddInteger(ST->isTruncatingStore());
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ID.AddInteger((unsigned int)(ST->getStoredVT()));
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ID.AddPointer(ST->getSrcValue());
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ID.AddInteger(ST->getSrcValueOffset());
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ID.AddInteger(ST->getAlignment());
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ID.AddInteger(ST->isVolatile());
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void *IP = 0;
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28
test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
Normal file
28
test/CodeGen/X86/2007-12-18-LoadCSEBug.ll
Normal file
@ -0,0 +1,28 @@
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; RUN: llvm-as < %s | llc -march=x86 | grep {(%esp)} | count 2
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; PR1872
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%struct.c34007g__designated___XUB = type { i32, i32, i32, i32 }
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%struct.c34007g__pkg__parent = type { i32*, %struct.c34007g__designated___XUB* }
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define void @_ada_c34007g() {
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entry:
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%x8 = alloca %struct.c34007g__pkg__parent, align 8 ; <%struct.c34007g__pkg__parent*> [#uses=2]
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%tmp1272 = getelementptr %struct.c34007g__pkg__parent* %x8, i32 0, i32 0 ; <i32**> [#uses=1]
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%x82167 = bitcast %struct.c34007g__pkg__parent* %x8 to i64* ; <i64*> [#uses=1]
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br i1 true, label %bb4668, label %bb848
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bb4668: ; preds = %bb4648
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%tmp5464 = load i64* %x82167, align 8 ; <i64> [#uses=1]
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%tmp5467 = icmp ne i64 0, %tmp5464 ; <i1> [#uses=1]
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%tmp5470 = load i32** %tmp1272, align 8 ; <i32*> [#uses=1]
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%tmp5471 = icmp eq i32* %tmp5470, null ; <i1> [#uses=1]
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%tmp5475 = or i1 %tmp5471, %tmp5467 ; <i1> [#uses=1]
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%tmp5497 = or i1 %tmp5475, false ; <i1> [#uses=1]
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br i1 %tmp5497, label %bb848, label %bb5507
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bb848: ; preds = %entry
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ret void
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bb5507: ; preds = %bb4668
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ret void
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}
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