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add support for using vxor to build zero vectors. This implements

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Regression/CodeGen/PowerPC/vec_zero.ll


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27059 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-03-24 07:48:08 +00:00
parent 937b90f998
commit 64b3a08bc6
3 changed files with 44 additions and 4 deletions
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36
lib/Target/PowerPC/PPCISelLowering.cpp
View File

@ -170,9 +170,6 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM)
setOperationAction(ISD::LOAD, (MVT::ValueType)VT, Expand);
setOperationAction(ISD::VECTOR_SHUFFLE, (MVT::ValueType)VT, Expand);
setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Expand);
// FIXME: We don't support any BUILD_VECTOR's yet. We should custom expand
// the ones we do, like splat(0.0) and splat(-0.0).
setOperationAction(ISD::BUILD_VECTOR, (MVT::ValueType)VT, Expand);
}
@ -193,6 +190,9 @@ PPCTargetLowering::PPCTargetLowering(TargetMachine &TM)
setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4f32, Custom);
setOperationAction(ISD::SCALAR_TO_VECTOR, MVT::v4i32, Custom);
setOperationAction(ISD::BUILD_VECTOR, MVT::v4i32, Custom);
setOperationAction(ISD::BUILD_VECTOR, MVT::v4f32, Custom);
}
setSetCCResultContents(ZeroOrOneSetCCResult);
@ -276,6 +276,26 @@ unsigned PPC::getVSPLTImmediate(SDNode *N) {
return cast<ConstantSDNode>(N->getOperand(0))->getValue();
}
/// isZeroVector - Return true if this build_vector is an all-zero vector.
///
bool PPC::isZeroVector(SDNode *N) {
if (MVT::isInteger(N->getOperand(0).getValueType())) {
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
if (!isa<ConstantSDNode>(N->getOperand(i)) ||
cast<ConstantSDNode>(N->getOperand(i))->getValue() != 0)
return false;
} else {
assert(MVT::isFloatingPoint(N->getOperand(0).getValueType()) &&
"Vector of non-int, non-float values?");
// See if this is all zeros.
for (unsigned i = 0, e = N->getNumOperands(); i != e; ++i)
if (!isa<ConstantFPSDNode>(N->getOperand(i)) ||
!cast<ConstantFPSDNode>(N->getOperand(i))->isExactlyValue(0.0))
return false;
}
return true;
}
/// LowerOperation - Provide custom lowering hooks for some operations.
///
@ -634,6 +654,16 @@ SDOperand PPCTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
return DAG.getNode(PPCISD::LVE_X, Op.getValueType(), Store, FIdx,
DAG.getSrcValue(NULL));
}
case ISD::BUILD_VECTOR:
// If this is a case we can't handle, return null and let the default
// expansion code take care of it. If we CAN select this case, return Op.
// See if this is all zeros.
// FIXME: We should handle splat(-0.0), and other cases here.
if (PPC::isZeroVector(Op.Val))
return Op;
return SDOperand();
case ISD::VECTOR_SHUFFLE: {
SDOperand V1 = Op.getOperand(0);
SDOperand V2 = Op.getOperand(1);

4
lib/Target/PowerPC/PPCISelLowering.h
View File

@ -101,6 +101,10 @@ namespace llvm {
/// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the
/// specified isSplatShuffleMask VECTOR_SHUFFLE mask.
unsigned getVSPLTImmediate(SDNode *N);
/// isZeroVector - Return true if this build_vector is an all-zero vector.
///
bool isZeroVector(SDNode *N);
}
class PPCTargetLowering : public TargetLowering {

8
lib/Target/PowerPC/PPCInstrInfo.td
View File

@ -135,6 +135,11 @@ def VSPLT_shuffle_mask : PatLeaf<(build_vector), [{
return PPC::isSplatShuffleMask(N);
}], VSPLT_get_imm>;
def vecimm0 : PatLeaf<(build_vector), [{
return PPC::isZeroVector(N);
}]>;
//===----------------------------------------------------------------------===//
// PowerPC Flag Definitions.
@ -1061,7 +1066,7 @@ def VSPLTW : VXForm_1<652, (ops VRRC:$vD, u5imm:$UIMM, VRRC:$vB),
def V_SET0 : VXForm_setzero<1220, (ops VRRC:$vD),
"vxor $vD, $vD, $vD", VecFP,
[]>;
[(set VRRC:$vD, (v4f32 vecimm0))]>;
}
@ -1209,6 +1214,7 @@ def : Pat<(v4i32 (PPClve_x xoaddr:$src)),
(v4i32 (LVEWX xoaddr:$src))>;
def : Pat<(v4i32 (undef)), (v4i32 (IMPLICIT_DEF_VRRC))>;
def : Pat<(v4i32 vecimm0), (v4i32 (V_SET0))>;
// bit_convert
def : Pat<(v4i32 (bitconvert (v4f32 VRRC:$src))), (v4i32 VRRC:$src)>;