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Change instruction description to split OperandList into OutOperandList and

Browse Source 
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40033 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2007-07-19 01:14:50 +00:00
parent 4558b807a2
commit 64d80e3387
33 changed files with 2662 additions and 2512 deletions
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14
utils/TableGen/CodeGenTarget.cpp
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@@ -376,13 +376,25 @@ CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr)
DagInit *DI;
try {
DI = R->getValueAsDag("OperandList");
DI = R->getValueAsDag("OutOperandList");
} catch (...) {
// Error getting operand list, just ignore it (sparcv9).
AsmString.clear();
OperandList.clear();
return;
}
NumDefs = DI->getNumArgs();
DagInit *IDI;
try {
IDI = R->getValueAsDag("InOperandList");
} catch (...) {
// Error getting operand list, just ignore it (sparcv9).
AsmString.clear();
OperandList.clear();
return;
}
DI = (DagInit*)(new BinOpInit(BinOpInit::CONCAT, DI, IDI))->Fold();
unsigned MIOperandNo = 0;
std::set<std::string> OperandNames;