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Add SSA verification to MachineVerifier.

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Somehow we never verified SSA dominance before.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@152458 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen 2012-03-10 00:36:06 +00:00
parent 1efd6b94a9
commit 64ffa83c9b
1 changed files with 12 additions and 2 deletions
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14
lib/CodeGen/MachineVerifier.cpp
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@ -1014,8 +1014,18 @@ void MachineVerifier::visitMachineFunctionAfter() {
}
// Now check liveness info if available
if (LiveVars || LiveInts)
calcRegsRequired();
calcRegsRequired();
if (MRI->isSSA() && !MF->empty()) {
BBInfo &MInfo = MBBInfoMap[&MF->front()];
for (RegSet::iterator
I = MInfo.vregsRequired.begin(), E = MInfo.vregsRequired.end(); I != E;
++I) {
report("Virtual register def doesn't dominate all uses.", MF);
*OS << "- register:\t" << PrintReg(*I) << '\n';
}
}
if (LiveVars)
verifyLiveVariables();
if (LiveInts)