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Add some dummy support for post-incremented loads

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@86385 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Anton Korobeynikov
2009-11-07 17:15:06 +00:00
parent 8983da729a
commit 6534f83ae8
5 changed files with 122 additions and 4 deletions
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40
lib/Target/MSP430/MSP430ISelDAGToDAG.cpp
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@@ -147,6 +147,7 @@ namespace {
DenseMap<SDNode*, SDNode*> RMWStores;
void PreprocessForRMW();
SDNode *Select(SDValue Op);
SDNode *SelectIndexedLoad(SDValue Op);
bool SelectAddr(SDValue Op, SDValue Addr, SDValue &Base, SDValue &Disp);
#ifndef NDEBUG
@@ -596,6 +597,40 @@ void MSP430DAGToDAGISel::PreprocessForRMW() {
}
}
SDNode *MSP430DAGToDAGISel::SelectIndexedLoad(SDValue Op) {
LoadSDNode *LD = cast<LoadSDNode>(Op);
ISD::MemIndexedMode AM = LD->getAddressingMode();
if (AM != ISD::POST_INC || LD->getExtensionType() != ISD::NON_EXTLOAD)
return NULL;
EVT VT = LD->getMemoryVT();
unsigned Opcode = 0;
switch (VT.getSimpleVT().SimpleTy) {
case MVT::i8:
// Sanity check
if (cast<ConstantSDNode>(LD->getOffset())->getZExtValue() != 1)
return NULL;
Opcode = MSP430::MOV8rm_POST;
break;
case MVT::i16:
// Sanity check
if (cast<ConstantSDNode>(LD->getOffset())->getZExtValue() != 2)
return NULL;
Opcode = MSP430::MOV16rm_POST;
break;
default:
return NULL;
}
return CurDAG->getMachineNode(Opcode, Op.getDebugLoc(),
VT.getSimpleVT().SimpleTy, MVT::i16, MVT::Other,
LD->getBasePtr(), LD->getChain());
}
/// InstructionSelect - This callback is invoked by
/// SelectionDAGISel when it has created a SelectionDAG for us to codegen.
void MSP430DAGToDAGISel::InstructionSelect() {
@@ -653,6 +688,11 @@ SDNode *MSP430DAGToDAGISel::Select(SDValue Op) {
return CurDAG->getMachineNode(MSP430::ADD16ri, dl, MVT::i16,
TFI, CurDAG->getTargetConstant(0, MVT::i16));
}
case ISD::LOAD:
if (SDNode *ResNode = SelectIndexedLoad(Op))
return ResNode;
// Other cases are autogenerated.
break;
}
// Select the default instruction