From 65569b8ddff9d4b8647377291f8f0f2cb647bfb9 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Fri, 21 May 2010 17:47:50 +0000 Subject: [PATCH] constify accessor. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104325 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/CodeGen/MachineRegisterInfo.h | 3 ++- lib/CodeGen/PreAllocSplitting.cpp | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/include/llvm/CodeGen/MachineRegisterInfo.h b/include/llvm/CodeGen/MachineRegisterInfo.h index fd7431ff0bc..dede05f85c0 100644 --- a/include/llvm/CodeGen/MachineRegisterInfo.h +++ b/include/llvm/CodeGen/MachineRegisterInfo.h @@ -216,7 +216,8 @@ public: /// getRegClassVirtRegs - Return the list of virtual registers of the given /// target register class. - std::vector &getRegClassVirtRegs(const TargetRegisterClass *RC) { + const std::vector & + getRegClassVirtRegs(const TargetRegisterClass *RC) const { return RegClass2VRegMap[RC->getID()]; } diff --git a/lib/CodeGen/PreAllocSplitting.cpp b/lib/CodeGen/PreAllocSplitting.cpp index eb19be12cee..997e82f11db 100644 --- a/lib/CodeGen/PreAllocSplitting.cpp +++ b/lib/CodeGen/PreAllocSplitting.cpp @@ -1154,7 +1154,7 @@ PreAllocSplitting::SplitRegLiveIntervals(const TargetRegisterClass **RCs, // codegen is not modelling. Ignore these barriers for now. if (!TII->isSafeToMoveRegClassDefs(*RC)) continue; - std::vector &VRs = MRI->getRegClassVirtRegs(*RC); + const std::vector &VRs = MRI->getRegClassVirtRegs(*RC); for (unsigned i = 0, e = VRs.size(); i != e; ++i) { unsigned Reg = VRs[i]; if (!LIs->hasInterval(Reg))