Convert assert(0) to llvm_unreachable

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@149814 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper 2012-02-05 07:21:30 +00:00
parent 0b2500c504
commit 655b8de7b2
19 changed files with 41 additions and 41 deletions

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@ -18,6 +18,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_MC_DESC

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@ -18,6 +18,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_MC_DESC

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@ -18,6 +18,7 @@
#include "llvm/Module.h"
#include "llvm/Type.h"
#include "llvm/Support/raw_ostream.h"
#include "llvm/Support/ErrorHandling.h"
#include <cstring>
using namespace llvm;

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@ -20,6 +20,7 @@
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_MC_DESC

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@ -20,6 +20,7 @@
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCStreamer.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_MC_DESC

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@ -17,6 +17,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_MC_DESC

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@ -24,6 +24,7 @@
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/ADT/Triple.h"
#include "llvm/Support/Host.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_REGINFO_MC_DESC

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@ -17,6 +17,7 @@
#include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/MC/MCSubtargetInfo.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/Support/TargetRegistry.h"
#define GET_INSTRINFO_MC_DESC

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@ -107,6 +107,7 @@
#include "llvm/ADT/StringExtras.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/ErrorHandling.h"
#include "llvm/TableGen/Error.h"
#include "llvm/TableGen/Record.h"
#include <map>
@ -251,7 +252,7 @@ public:
switch (Kind) {
case Invalid:
assert(0 && "Invalid kind!");
llvm_unreachable("Invalid kind!");
default:
// This class precedes the RHS if it is a proper subset of the RHS.

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@ -544,7 +544,7 @@ void AsmWriterEmitter::EmitGetRegisterName(raw_ostream &O) {
O << " const unsigned *RegAsmOffset;\n"
<< " const char *AsmStrs;\n"
<< " switch(AltIdx) {\n"
<< " default: assert(0 && \"Invalid register alt name index!\");\n";
<< " default: llvm_unreachable(\"Invalid register alt name index!\");\n";
for (unsigned i = 0, e = AltNameIndices.size(); i < e; ++i) {
StringRef Namespace = AltNameIndices[1]->getValueAsString("Namespace");
StringRef AltName(AltNameIndices[i]->getName());

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@ -749,7 +749,7 @@ std::string PatternToMatch::getPredicateCheck() const {
#ifndef NDEBUG
Def->dump();
#endif
assert(0 && "Unknown predicate type!");
llvm_unreachable("Unknown predicate type!");
}
if (!PredicateCheck.empty())
PredicateCheck += " && ";
@ -1609,10 +1609,9 @@ bool TreePatternNode::ApplyTypeConstraints(TreePattern &TP, bool NotRegisters) {
MadeChange |= Child->UpdateNodeType(ChildResNo, MVT::iPTR, TP);
} else if (OperandNode->getName() == "unknown") {
// Nothing to do.
} else {
assert(0 && "Unknown operand type!");
abort();
}
} else
llvm_unreachable("Unknown operand type!");
MadeChange |= Child->ApplyTypeConstraints(TP, NotRegisters);
}

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@ -19,6 +19,7 @@
#include "CodeGenIntrinsics.h"
#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/Support/ErrorHandling.h"
#include <set>
#include <algorithm>
#include <vector>
@ -723,8 +724,7 @@ public:
if (Intrinsics[i].TheDef == R) return Intrinsics[i];
for (unsigned i = 0, e = TgtIntrinsics.size(); i != e; ++i)
if (TgtIntrinsics[i].TheDef == R) return TgtIntrinsics[i];
assert(0 && "Unknown intrinsic!");
abort();
llvm_unreachable("Unknown intrinsic!");
}
const CodeGenIntrinsic &getIntrinsicInfo(unsigned IID) const {
@ -732,8 +732,7 @@ public:
return Intrinsics[IID-1];
if (IID-Intrinsics.size()-1 < TgtIntrinsics.size())
return TgtIntrinsics[IID-Intrinsics.size()-1];
assert(0 && "Bad intrinsic ID!");
abort();
llvm_unreachable("Bad intrinsic ID!");
}
unsigned getIntrinsicID(Record *R) const {
@ -741,8 +740,7 @@ public:
if (Intrinsics[i].TheDef == R) return i;
for (unsigned i = 0, e = TgtIntrinsics.size(); i != e; ++i)
if (TgtIntrinsics[i].TheDef == R) return i + Intrinsics.size();
assert(0 && "Unknown intrinsic!");
abort();
llvm_unreachable("Unknown intrinsic!");
}
const DAGDefaultOperand &getDefaultOperand(Record *R) const {

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@ -22,6 +22,7 @@
#include "llvm/ADT/BitVector.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SetVector.h"
#include "llvm/Support/ErrorHandling.h"
#include <cstdlib>
#include <map>
#include <string>
@ -192,8 +193,7 @@ namespace llvm {
MVT::SimpleValueType getValueTypeNum(unsigned VTNum) const {
if (VTNum < VTs.size())
return VTs[VTNum];
assert(0 && "VTNum greater than number of ValueTypes in RegClass!");
abort();
llvm_unreachable("VTNum greater than number of ValueTypes in RegClass!");
}
// Return true if this this class contains the register.

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@ -93,7 +93,7 @@ std::string llvm::getEnumName(MVT::SimpleValueType T) {
case MVT::iPTR: return "MVT::iPTR";
case MVT::iPTRAny: return "MVT::iPTRAny";
case MVT::Untyped: return "MVT::Untyped";
default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
default: llvm_unreachable("ILLEGAL VALUE TYPE!");
}
}
@ -515,7 +515,7 @@ CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
unsigned ArgNo = Property->getValueAsInt("ArgNo");
ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
} else
assert(0 && "Unknown property!");
llvm_unreachable("Unknown property!");
}
// Sort the argument attributes for later benefit.

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@ -573,8 +573,7 @@ EmitMatcher(const Matcher *N, unsigned Indent, unsigned CurrentIdx,
return 2 + NumResultBytes;
}
}
assert(0 && "Unreachable");
return 0;
llvm_unreachable("Unreachable");
}
/// EmitMatcherList - Emit the bytes for the specified matcher subtree.
@ -601,7 +600,7 @@ void MatcherTableEmitter::EmitPredicateFunctions(formatted_raw_ostream &OS) {
if (!PatternPredicates.empty()) {
OS << "bool CheckPatternPredicate(unsigned PredNo) const {\n";
OS << " switch (PredNo) {\n";
OS << " default: assert(0 && \"Invalid predicate in table?\");\n";
OS << " default: llvm_unreachable(\"Invalid predicate in table?\");\n";
for (unsigned i = 0, e = PatternPredicates.size(); i != e; ++i)
OS << " case " << i << ": return " << PatternPredicates[i] << ";\n";
OS << " }\n";
@ -619,7 +618,7 @@ void MatcherTableEmitter::EmitPredicateFunctions(formatted_raw_ostream &OS) {
if (!NodePredicates.empty()) {
OS << "bool CheckNodePredicate(SDNode *Node, unsigned PredNo) const {\n";
OS << " switch (PredNo) {\n";
OS << " default: assert(0 && \"Invalid predicate in table?\");\n";
OS << " default: llvm_unreachable(\"Invalid predicate in table?\");\n";
for (unsigned i = 0, e = NodePredicates.size(); i != e; ++i) {
// Emit the predicate code corresponding to this pattern.
TreePredicateFn PredFn = NodePredicates[i];
@ -641,7 +640,7 @@ void MatcherTableEmitter::EmitPredicateFunctions(formatted_raw_ostream &OS) {
OS << " SmallVectorImpl<std::pair<SDValue, SDNode*> > &Result) {\n";
OS << " unsigned NextRes = Result.size();\n";
OS << " switch (PatternNo) {\n";
OS << " default: assert(0 && \"Invalid pattern # in table?\");\n";
OS << " default: llvm_unreachable(\"Invalid pattern # in table?\");\n";
for (unsigned i = 0, e = ComplexPatterns.size(); i != e; ++i) {
const ComplexPattern &P = *ComplexPatterns[i];
unsigned NumOps = P.getNumOperands();
@ -679,7 +678,7 @@ void MatcherTableEmitter::EmitPredicateFunctions(formatted_raw_ostream &OS) {
if (!NodeXForms.empty()) {
OS << "SDValue RunSDNodeXForm(SDValue V, unsigned XFormNo) {\n";
OS << " switch (XFormNo) {\n";
OS << " default: assert(0 && \"Invalid xform # in table?\");\n";
OS << " default: llvm_unreachable(\"Invalid xform # in table?\");\n";
// FIXME: The node xform could take SDValue's instead of SDNode*'s.
for (unsigned i = 0, e = NodeXForms.size(); i != e; ++i) {

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@ -71,7 +71,7 @@ static void dumpBits(raw_ostream &o, BitsInit &bits) {
o << "_";
break;
default:
assert(0 && "unexpected return value from bitFromBits");
llvm_unreachable("unexpected return value from bitFromBits");
}
}
}
@ -698,9 +698,7 @@ unsigned FilterChooser::getIslands(std::vector<unsigned> &StartBits,
Val = Value(Insn[i]);
bool Filtered = PositionFiltered(i);
switch (State) {
default:
assert(0 && "Unreachable code!");
break;
default: llvm_unreachable("Unreachable code!");
case 0:
case 1:
if (Filtered || Val == -1)
@ -1069,7 +1067,7 @@ bool FilterChooser::filterProcessor(bool AllowMixed, bool Greedy) {
RA = ATTR_MIXED;
break;
default:
assert(0 && "Unexpected bitAttr!");
llvm_unreachable("Unexpected bitAttr!");
}
break;
case ATTR_ALL_SET:
@ -1090,7 +1088,7 @@ bool FilterChooser::filterProcessor(bool AllowMixed, bool Greedy) {
RA = ATTR_MIXED;
break;
default:
assert(0 && "Unexpected bitAttr!");
llvm_unreachable("Unexpected bitAttr!");
}
break;
case ATTR_MIXED:
@ -1112,13 +1110,13 @@ bool FilterChooser::filterProcessor(bool AllowMixed, bool Greedy) {
case ATTR_MIXED:
break;
default:
assert(0 && "Unexpected bitAttr!");
llvm_unreachable("Unexpected bitAttr!");
}
break;
case ATTR_ALL_UNSET:
assert(0 && "regionAttr state machine has no ATTR_UNSET state");
llvm_unreachable("regionAttr state machine has no ATTR_UNSET state");
case ATTR_FILTERED:
assert(0 && "regionAttr state machine has no ATTR_FILTERED state");
llvm_unreachable("regionAttr state machine has no ATTR_FILTERED state");
}
}

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@ -320,7 +320,7 @@ void IntrinsicEmitter::EmitVerifier(const std::vector<CodeGenIntrinsic> &Ints,
OS << "// Verifier::visitIntrinsicFunctionCall code.\n";
OS << "#ifdef GET_INTRINSIC_VERIFIER\n";
OS << " switch (ID) {\n";
OS << " default: assert(0 && \"Invalid intrinsic!\");\n";
OS << " default: llvm_unreachable(\"Invalid intrinsic!\");\n";
// This checking can emit a lot of very common code. To reduce the amount of
// code that we emit, batch up cases that have identical types. This avoids
@ -416,7 +416,7 @@ void IntrinsicEmitter::EmitGenerator(const std::vector<CodeGenIntrinsic> &Ints,
OS << "// Code for generating Intrinsic function declarations.\n";
OS << "#ifdef GET_INTRINSIC_GENERATOR\n";
OS << " switch (id) {\n";
OS << " default: assert(0 && \"Invalid intrinsic!\");\n";
OS << " default: llvm_unreachable(\"Invalid intrinsic!\");\n";
// Similar to GET_INTRINSIC_VERIFIER, batch up cases that have identical
// types.
@ -485,8 +485,7 @@ namespace {
case CodeGenIntrinsic::ReadWriteMem:
return MRK_none;
}
assert(0 && "bad mod-ref kind");
return MRK_none;
llvm_unreachable("bad mod-ref kind");
}
struct AttributeComparator {

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@ -67,7 +67,7 @@ addDagOperandMapping(Record *Rec, DagInit *Dag, CodeGenInstruction &Insn,
// Since we added more than one, we also need to adjust the base.
BaseIdx += NewOps - 1;
} else
assert(0 && "Unhandled pseudo-expansion argument type!");
llvm_unreachable("Unhandled pseudo-expansion argument type!");
}
return OpsAdded;
}

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@ -134,8 +134,7 @@ RegisterInfoEmitter::EmitRegMapping(raw_ostream &OS,
OS << "EHFlavour";
OS << ") {\n"
<< " default:\n"
<< " assert(0 && \"Unknown DWARF flavour\");\n"
<< " break;\n";
<< " llvm_unreachable(\"Unknown DWARF flavour\");\n";
for (unsigned i = 0, e = maxLength; i != e; ++i) {
OS << " case " << i << ":\n";
@ -180,8 +179,7 @@ RegisterInfoEmitter::EmitRegMapping(raw_ostream &OS,
OS << "EHFlavour";
OS << ") {\n"
<< " default:\n"
<< " assert(0 && \"Unknown DWARF flavour\");\n"
<< " break;\n";
<< " llvm_unreachable(\"Unknown DWARF flavour\");\n";
for (unsigned i = 0, e = maxLength; i != e; ++i) {
OS << " case " << i << ":\n";