From 656ac6f0f6f728ddc178f92c25b2278d23ff4e61 Mon Sep 17 00:00:00 2001 From: Anton Korobeynikov Date: Thu, 16 Jul 2009 13:51:53 +0000 Subject: [PATCH] Provide proper stack offsets for outgoing arguments git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@75945 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/SystemZ/SystemZISelLowering.cpp | 17 ++++++++++++----- lib/Target/SystemZ/SystemZISelLowering.h | 2 ++ lib/Target/SystemZ/SystemZInstrInfo.h | 2 +- lib/Target/SystemZ/SystemZTargetMachine.h | 2 +- 4 files changed, 16 insertions(+), 7 deletions(-) diff --git a/lib/Target/SystemZ/SystemZISelLowering.cpp b/lib/Target/SystemZ/SystemZISelLowering.cpp index 937c4c858c6..c8ad01758cc 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.cpp +++ b/lib/Target/SystemZ/SystemZISelLowering.cpp @@ -38,6 +38,8 @@ using namespace llvm; SystemZTargetLowering::SystemZTargetLowering(SystemZTargetMachine &tm) : TargetLowering(tm), Subtarget(*tm.getSubtargetImpl()), TM(tm) { + RegInfo = TM.getRegisterInfo(); + // Set up the register classes. addRegisterClass(MVT::i32, SystemZ::GR32RegisterClass); addRegisterClass(MVT::i64, SystemZ::GR64RegisterClass); @@ -190,6 +192,7 @@ SDValue SystemZTargetLowering::LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, SDValue Callee = TheCall->getCallee(); bool isVarArg = TheCall->isVarArg(); DebugLoc dl = Op.getDebugLoc(); + MachineFunction &MF = DAG.getMachineFunction(); // Analyze operands of the call, assigning locations to each operand. SmallVector ArgLocs; @@ -237,12 +240,16 @@ SDValue SystemZTargetLowering::LowerCCCCallTo(SDValue Op, SelectionDAG &DAG, assert(VA.isMemLoc()); if (StackPtr.getNode() == 0) - StackPtr = DAG.getCopyFromReg(Chain, dl, SystemZ::R15D, getPointerTy()); - - SDValue PtrOff = DAG.getNode(ISD::ADD, dl, getPointerTy(), - StackPtr, - DAG.getIntPtrConstant(VA.getLocMemOffset())); + StackPtr = + DAG.getCopyFromReg(Chain, dl, + (RegInfo->hasFP(MF) ? + SystemZ::R11D : SystemZ::R15D), + getPointerTy()); + SDValue PtrOff = + DAG.getNode(ISD::ADD, dl, getPointerTy(), + StackPtr, + DAG.getIntPtrConstant(160+VA.getLocMemOffset())); MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, PseudoSourceValue::getStack(), diff --git a/lib/Target/SystemZ/SystemZISelLowering.h b/lib/Target/SystemZ/SystemZISelLowering.h index 760a51d8dd5..4e74b972430 100644 --- a/lib/Target/SystemZ/SystemZISelLowering.h +++ b/lib/Target/SystemZ/SystemZISelLowering.h @@ -16,6 +16,7 @@ #define LLVM_TARGET_SystemZ_ISELLOWERING_H #include "SystemZ.h" +#include "SystemZRegisterInfo.h" #include "llvm/CodeGen/SelectionDAG.h" #include "llvm/Target/TargetLowering.h" @@ -61,6 +62,7 @@ namespace llvm { private: const SystemZSubtarget &Subtarget; const SystemZTargetMachine &TM; + const SystemZRegisterInfo *RegInfo; }; } // namespace llvm diff --git a/lib/Target/SystemZ/SystemZInstrInfo.h b/lib/Target/SystemZ/SystemZInstrInfo.h index 1e0cc82c69b..6bc9f373932 100644 --- a/lib/Target/SystemZ/SystemZInstrInfo.h +++ b/lib/Target/SystemZ/SystemZInstrInfo.h @@ -33,7 +33,7 @@ public: /// such, whenever a client has an instance of instruction info, it should /// always be able to get register info as well (through this method). /// - virtual const TargetRegisterInfo &getRegisterInfo() const { return RI; } + virtual const SystemZRegisterInfo &getRegisterInfo() const { return RI; } bool copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, unsigned DestReg, unsigned SrcReg, diff --git a/lib/Target/SystemZ/SystemZTargetMachine.h b/lib/Target/SystemZ/SystemZTargetMachine.h index 194d5fe016c..4862a99b4cc 100644 --- a/lib/Target/SystemZ/SystemZTargetMachine.h +++ b/lib/Target/SystemZ/SystemZTargetMachine.h @@ -48,7 +48,7 @@ public: virtual const TargetData *getTargetData() const { return &DataLayout;} virtual const SystemZSubtarget *getSubtargetImpl() const { return &Subtarget; } - virtual const TargetRegisterInfo *getRegisterInfo() const { + virtual const SystemZRegisterInfo *getRegisterInfo() const { return &InstrInfo.getRegisterInfo(); }