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Clean up TargetOpcodes.h a bit, and limit the number of places where the full

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list of predefined instructions appear. Add some consistency checks.

Ideally, TargetOpcodes.h should be produced by TableGen from Target.td, but it
is hardly worth the effort.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@107520 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jakob Stoklund Olesen
2010-07-02 21:44:22 +00:00
parent 6627ac040a
commit 65766ce7df
4 changed files with 48 additions and 110 deletions
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utils/TableGen/CodeEmitterGen.cpp
+5 -40
View File
@@ -24,19 +24,8 @@ void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
I != E; ++I) {
Record *R = *I;
if (R->getName() == "PHI" ||
R->getName() == "INLINEASM" ||
R->getName() == "DBG_LABEL" ||
R->getName() == "EH_LABEL" ||
R->getName() == "GC_LABEL" ||
R->getName() == "KILL" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG" ||
R->getName() == "COPY_TO_REGCLASS" ||
R->getName() == "DBG_VALUE" ||
R->getName() == "REG_SEQUENCE") continue;
if (R->getValueAsString("Namespace") == "TargetOpcode")
continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
@@ -103,19 +92,7 @@ void CodeEmitterGen::run(raw_ostream &o) {
const CodeGenInstruction *CGI = *IN;
Record *R = CGI->TheDef;
if (R->getName() == "PHI" ||
R->getName() == "INLINEASM" ||
R->getName() == "DBG_LABEL" ||
R->getName() == "EH_LABEL" ||
R->getName() == "GC_LABEL" ||
R->getName() == "KILL" ||
R->getName() == "EXTRACT_SUBREG" ||
R->getName() == "INSERT_SUBREG" ||
R->getName() == "IMPLICIT_DEF" ||
R->getName() == "SUBREG_TO_REG" ||
R->getName() == "COPY_TO_REGCLASS" ||
R->getName() == "DBG_VALUE" ||
R->getName() == "REG_SEQUENCE") {
if (R->getValueAsString("Namespace") == "TargetOpcode") {
o << " 0U,\n";
continue;
}
@@ -140,22 +117,10 @@ void CodeEmitterGen::run(raw_ostream &o) {
for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end();
IC != EC; ++IC) {
Record *R = *IC;
if (R->getValueAsString("Namespace") == "TargetOpcode")
continue;
const std::string &InstName = R->getName();
std::string Case("");
if (InstName == "PHI" ||
InstName == "INLINEASM" ||
InstName == "DBG_LABEL"||
InstName == "EH_LABEL"||
InstName == "GC_LABEL"||
InstName == "KILL"||
InstName == "EXTRACT_SUBREG" ||
InstName == "INSERT_SUBREG" ||
InstName == "IMPLICIT_DEF" ||
InstName == "SUBREG_TO_REG" ||
InstName == "COPY_TO_REGCLASS" ||
InstName == "DBG_VALUE" ||
InstName == "REG_SEQUENCE") continue;
BitsInit *BI = R->getValueAsBitsInit("Inst");
const std::vector<RecordVal> &Vals = R->getValues();