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It's important for the cmp-and-swap to balance
loads and stores but it's even more important for it to store the right value.:( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@55319 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -4040,38 +4040,56 @@ PPCTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
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unsigned oldval = MI->getOperand(3).getReg();
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unsigned newval = MI->getOperand(4).getReg();
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MachineBasicBlock *loopMBB = F->CreateMachineBasicBlock(LLVM_BB);
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MachineBasicBlock *loop1MBB = F->CreateMachineBasicBlock(LLVM_BB);
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MachineBasicBlock *loop2MBB = F->CreateMachineBasicBlock(LLVM_BB);
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MachineBasicBlock *midMBB = F->CreateMachineBasicBlock(LLVM_BB);
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MachineBasicBlock *exitMBB = F->CreateMachineBasicBlock(LLVM_BB);
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F->insert(It, loopMBB);
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F->insert(It, loop1MBB);
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F->insert(It, loop2MBB);
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F->insert(It, midMBB);
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F->insert(It, exitMBB);
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exitMBB->transferSuccessors(BB);
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// thisMBB:
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// ...
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// fallthrough --> loopMBB
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BB->addSuccessor(loopMBB);
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BB->addSuccessor(loop1MBB);
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// loopMBB:
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// loop1MBB:
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// l[wd]arx dest, ptr
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// cmp[wd] CR1, dest, oldval
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// cmp[wd] dest, oldval
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// bne- midMBB
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// loop2MBB:
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// st[wd]cx. newval, ptr
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// bne- CR1, exitMBB
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// bne- loopMBB
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// fallthrough --> exitMBB
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BB = loopMBB;
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// b exitBB
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// midMBB:
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// st[wd]cx. dest, ptr
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// exitBB:
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BB = loop1MBB;
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BuildMI(BB, TII->get(is64bit ? PPC::LDARX : PPC::LWARX), dest)
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.addReg(ptrA).addReg(ptrB);
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BuildMI(BB, TII->get(is64bit ? PPC::CMPD : PPC::CMPW), PPC::CR1)
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BuildMI(BB, TII->get(is64bit ? PPC::CMPD : PPC::CMPW), PPC::CR0)
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.addReg(oldval).addReg(dest);
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BuildMI(BB, TII->get(PPC::BCC))
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.addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(midMBB);
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BB->addSuccessor(loop2MBB);
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BB->addSuccessor(midMBB);
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BB = loop2MBB;
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BuildMI(BB, TII->get(is64bit ? PPC::STDCX : PPC::STWCX))
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.addReg(newval).addReg(ptrA).addReg(ptrB);
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BuildMI(BB, TII->get(PPC::BCC))
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.addImm(PPC::PRED_NE).addReg(PPC::CR1).addMBB(exitMBB);
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BuildMI(BB, TII->get(PPC::BCC))
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.addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loopMBB);
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BB->addSuccessor(loopMBB);
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.addImm(PPC::PRED_NE).addReg(PPC::CR0).addMBB(loop1MBB);
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BuildMI(BB, TII->get(PPC::B)).addMBB(exitMBB);
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BB->addSuccessor(loop1MBB);
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BB->addSuccessor(exitMBB);
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BB = midMBB;
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BuildMI(BB, TII->get(is64bit ? PPC::STDCX : PPC::STWCX))
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.addReg(dest).addReg(ptrA).addReg(ptrB);
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BB->addSuccessor(exitMBB);
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// exitMBB:
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// ...
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BB = exitMBB;
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