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For PR1319: Upgrade to use new test harness

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36075 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Reid Spencer 2007-04-15 18:40:57 +00:00
parent 601e845d60
commit 65f47a3a05
17 changed files with 54 additions and 50 deletions
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28
test/CodeGen/Alpha/add.ll
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@ -1,21 +1,21 @@
;test all the shifted and signextending adds and subs with and without consts
;
; RUN: llvm-as < %s | llc -march=alpha -o %t.s -f &&
; RUN: grep ' addl' %t.s | wc -l | grep 2 &&
; RUN: grep ' addq' %t.s | wc -l | grep 2 &&
; RUN: grep ' subl' %t.s | wc -l | grep 2 &&
; RUN: grep ' subq' %t.s | wc -l | grep 1 &&
; RUN: llvm-as < %s | llc -march=alpha -o %t.s -f
; RUN: grep { addl} %t.s | wc -l | grep 2
; RUN: grep { addq} %t.s | wc -l | grep 2
; RUN: grep { subl} %t.s | wc -l | grep 2
; RUN: grep { subq} %t.s | wc -l | grep 1
;
; RUN: grep 'lda $0,-100($16)' %t.s | wc -l | grep 1 &&
; RUN: grep 's4addl' %t.s | wc -l | grep 2 &&
; RUN: grep 's8addl' %t.s | wc -l | grep 2 &&
; RUN: grep 's4addq' %t.s | wc -l | grep 2 &&
; RUN: grep 's8addq' %t.s | wc -l | grep 2 &&
; RUN: grep {lda \$0,-100(\$16)} %t.s | wc -l | grep 1
; RUN: grep {s4addl} %t.s | wc -l | grep 2
; RUN: grep {s8addl} %t.s | wc -l | grep 2
; RUN: grep {s4addq} %t.s | wc -l | grep 2
; RUN: grep {s8addq} %t.s | wc -l | grep 2
;
; RUN: grep 's4subl' %t.s | wc -l | grep 2 &&
; RUN: grep 's8subl' %t.s | wc -l | grep 2 &&
; RUN: grep 's4subq' %t.s | wc -l | grep 2 &&
; RUN: grep 's8subq' %t.s | wc -l | grep 2
; RUN: grep {s4subl} %t.s | wc -l | grep 2
; RUN: grep {s8subl} %t.s | wc -l | grep 2
; RUN: grep {s4subq} %t.s | wc -l | grep 2
; RUN: grep {s8subq} %t.s | wc -l | grep 2
define i32 @al(i32 sext %x.s, i32 sext %y.s) sext {

2
test/CodeGen/Alpha/bic.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens to the bic instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'bic'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep {bic}
implementation ; Functions:

2
test/CodeGen/Alpha/bsr.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens the bsr instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'bsr'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep bsr
implementation

20
test/CodeGen/Alpha/ctlz.ll
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@ -1,16 +1,14 @@
; Make sure this testcase codegens to the ctlz instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev67 | grep -i 'ctlz'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mattr=+CIX | grep -i 'ctlz'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev6 | not grep -i 'ctlz'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev56 | not grep -i 'ctlz'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mattr=-CIX | not grep -i 'ctlz'
; RUN: llvm-as < %s | llc -march=alpha -mcpu=ev67 | grep -i ctlz
; RUN: llvm-as < %s | llc -march=alpha -mattr=+CIX | grep -i ctlz
; RUN: llvm-as < %s | llc -march=alpha -mcpu=ev6 | not grep -i ctlz
; RUN: llvm-as < %s | llc -march=alpha -mcpu=ev56 | not grep -i ctlz
; RUN: llvm-as < %s | llc -march=alpha -mattr=-CIX | not grep -i ctlz
declare ubyte %llvm.ctlz(ubyte)
declare i32 @llvm.ctlz.i8(i8)
implementation ; Functions:
ubyte %bar(ubyte %x) {
define i32 @bar(i8 %x) {
entry:
%tmp.1 = call ubyte %llvm.ctlz( ubyte %x )
ret ubyte %tmp.1
%tmp.1 = call i32 @llvm.ctlz.i8( i8 %x )
ret i32 %tmp.1
}

2
test/CodeGen/Alpha/ctlz_e.ll
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@ -1,5 +1,5 @@
; Make sure this testcase does not use ctpop
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep -i 'ctpop' |wc -l |grep 0
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | not grep -i ctpop
declare ulong %llvm.ctlz(ulong)

15
test/CodeGen/Alpha/ctpop.ll
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@ -1,10 +1,13 @@
; Make sure this testcase codegens to the ctpop instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev67 | grep -i 'ctpop'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mattr=+CIX | grep -i 'ctpop'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev6 | not grep -i 'ctpop'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev56 | not grep -i 'ctpop'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mattr=-CIX | not grep -i 'ctpop'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev67 | grep -i ctpop
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mattr=+CIX | \
; RUN: grep -i ctpop
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev6 | \
; RUN: not grep -i ctpop
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mcpu=ev56 | \
; RUN: not grep -i ctpop
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha -mattr=-CIX | \
; RUN: not grep -i 'ctpop'
declare long %llvm.ctpop(long)

4
test/CodeGen/Alpha/dg.exp
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@ -1,3 +1,3 @@
load_lib llvm-dg.exp
load_lib llvm.exp
llvm-runtest [lsort [glob -nocomplain $srcdir/$subdir/*.{ll}]]
RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll}]]

2
test/CodeGen/Alpha/eqv.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens to the eqv instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'eqv'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep eqv
implementation ; Functions:

2
test/CodeGen/Alpha/i32_sub_1.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens to the ctpop instruction
; RUN: llvm-as < %s | llc -march=alpha | grep -i 'subl $16,1,$0'
; RUN: llvm-as < %s | llc -march=alpha | grep -i {subl \$16,1,\$0}
define i32 @foo(i32 sext %x) sext {

12
test/CodeGen/Alpha/jmp_table.ll
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@ -1,8 +1,10 @@
; try to check that we have the most important instructions, which shouldn't appear otherwise
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'jmp' &&
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'gprel32' &&
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'ldl' &&
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'rodata'
; try to check that we have the most important instructions, which shouldn't
; appear otherwise
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep jmp
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep gprel32
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep ldl
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep rodata
; END.
target endian = little
target pointersize = 64

3
test/CodeGen/Alpha/mul5.ll
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@ -1,5 +1,6 @@
; Make sure this testcase does not use mulq
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep -i 'mul' |wc -l |grep 0
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | \
; RUN: not grep -i mul
implementation ; Functions:

2
test/CodeGen/Alpha/neg1.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens to the lda -1 instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep '\-1'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep {\\-1}
implementation ; Functions:

2
test/CodeGen/Alpha/not.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens to the ornot instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'eqv'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep eqv
implementation ; Functions:

2
test/CodeGen/Alpha/ornot.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens to the ornot instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'ornot'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep ornot
implementation ; Functions:

2
test/CodeGen/Alpha/srl_and.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens to the zapnot instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'zapnot'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep zapnot
ulong %foo(ulong %y) {
entry:

2
test/CodeGen/Alpha/zapnot.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens to the bic instruction
; RUN: llvm-as < %s | llc -march=alpha | grep 'zapnot'
; RUN: llvm-as < %s | llc -march=alpha | grep zapnot
define i16 @foo(i64 %y) zext {

2
test/CodeGen/Alpha/zapnot2.ll
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@ -1,5 +1,5 @@
; Make sure this testcase codegens to the zapnot instruction
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep 'zapnot'
; RUN: llvm-upgrade < %s | llvm-as | llc -march=alpha | grep zapnot
implementation ; Functions: