From 6612e3aedaf0e8525e53a4762d143b9ebb0059eb Mon Sep 17 00:00:00 2001 From: Juergen Ributzka Date: Tue, 4 Nov 2014 22:20:07 +0000 Subject: [PATCH] [AArch64] Use the correct register class for ORR. While fixing up the register classes in the machine combiner in a previous commit I missed one. This fixes the last one and adds a test case. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@221308 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/AArch64/AArch64InstrInfo.cpp | 2 +- test/CodeGen/AArch64/madd-combiner.ll | 19 ++++++++++++++++++- 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/lib/Target/AArch64/AArch64InstrInfo.cpp b/lib/Target/AArch64/AArch64InstrInfo.cpp index c8592bd1c88..c5bf3c79477 100644 --- a/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -2805,7 +2805,7 @@ void AArch64InstrInfo::genAlternativeCodeSequence( RC = &AArch64::GPR32RegClass; } else { OrrOpc = AArch64::ORRXri; - OrrRC = &AArch64::GPR64RegClass; + OrrRC = &AArch64::GPR64spRegClass; BitSize = 64; ZeroReg = AArch64::XZR; Opc = AArch64::MADDXrrr; diff --git a/test/CodeGen/AArch64/madd-combiner.ll b/test/CodeGen/AArch64/madd-combiner.ll index e7f171b9048..7c9787a7281 100644 --- a/test/CodeGen/AArch64/madd-combiner.ll +++ b/test/CodeGen/AArch64/madd-combiner.ll @@ -1,4 +1,5 @@ -; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-apple-darwin -verify-machineinstrs < %s | FileCheck %s +; RUN: llc -mtriple=aarch64-apple-darwin -fast-isel -verify-machineinstrs < %s | FileCheck %s ; Test that we use the correct register class. define i32 @mul_add_imm(i32 %a, i32 %b) { @@ -18,3 +19,19 @@ define i32 @mul_sub_imm1(i32 %a, i32 %b) { %2 = sub i32 4, %1 ret i32 %2 } + +; bugpoint reduced test case. This only tests that we pass the MI verifier. +define void @mul_add_imm2() { +entry: + br label %for.body +for.body: + br i1 undef, label %for.body, label %for.body8 +for.body8: + %0 = mul i64 undef, -3 + %mul1971 = add i64 %0, -3 + %cmp7 = icmp slt i64 %mul1971, 1390451930000 + br i1 %cmp7, label %for.body8, label %for.end20 +for.end20: + ret void +} +