From 6644d4c9335f0e31ffdf317e9db59a18f1870564 Mon Sep 17 00:00:00 2001 From: Nate Begeman Date: Sun, 3 Apr 2005 23:11:17 +0000 Subject: [PATCH] Full varargs support. All of UnitTests now passes git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@21070 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/PowerPC/PPCISelPattern.cpp | 20 +++++++++++++++----- 1 file changed, 15 insertions(+), 5 deletions(-) diff --git a/lib/Target/PowerPC/PPCISelPattern.cpp b/lib/Target/PowerPC/PPCISelPattern.cpp index 6d79c9c7a44..35be0a07259 100644 --- a/lib/Target/PowerPC/PPCISelPattern.cpp +++ b/lib/Target/PowerPC/PPCISelPattern.cpp @@ -194,12 +194,22 @@ PPC32TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { // the start of the first vararg value... for expansion of llvm.va_start. if (F.isVarArg()) { VarArgsFrameIndex = MFI->CreateFixedObject(4, ArgOffset); - // If this function is vararg, store r4-r10 to their spots on the stack so - // that they may be loaded by dereferencing va_next SDOperand FIN = DAG.getFrameIndex(VarArgsFrameIndex, MVT::i32); - SDOperand Val = DAG.getCopyFromReg(PPC::R4, MVT::i32, DAG.getRoot()); - SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1), Val, FIN); - DAG.setRoot(Store); + // If this function is vararg, store any remaining integer argument regs + // to their spots on the stack so that they may be loaded by deferencing the + // result of va_next. + std::vector MemOps; + for (; GPR_remaining > 0; --GPR_remaining, ++GPR_idx) { + BuildMI(&BB, PPC::IMPLICIT_DEF, 0, GPR[GPR_idx]); + SDOperand Val = DAG.getCopyFromReg(GPR[GPR_idx], MVT::i32, DAG.getRoot()); + SDOperand Store = DAG.getNode(ISD::STORE, MVT::Other, Val.getValue(1), + Val, FIN); + MemOps.push_back(Store); + // Increment the address by four for the next argument to store + SDOperand PtrOff = DAG.getConstant(4, getPointerTy()); + FIN = DAG.getNode(ISD::ADD, MVT::i32, FIN, PtrOff); + } + DAG.setRoot(DAG.getNode(ISD::TokenFactor, MVT::Other, MemOps)); } return ArgValues;