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https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-19 04:29:21 +00:00
Added patterns for MOVHPSmr and MOVLPSmr.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27497 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -746,14 +746,23 @@ def MOVHPDrm : PDI<0x16, MRMSrcMem, (ops VR128:$dst, VR128:$src1, f64mem:$src2),
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}
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def MOVLPSmr : PSI<0x13, MRMDestMem, (ops f64mem:$dst, VR128:$src),
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"movlps {$src, $dst|$dst, $src}", []>;
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"movlps {$src, $dst|$dst, $src}",
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[(store (f64 (vector_extract (bc_v2f64 (v4f32 VR128:$src)),
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(i32 0))), addr:$dst)]>;
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def MOVLPDmr : PDI<0x13, MRMDestMem, (ops f64mem:$dst, VR128:$src),
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"movlpd {$src, $dst|$dst, $src}",
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[(store (f64 (vector_extract (v2f64 VR128:$src),
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(i32 0))), addr:$dst)]>;
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// v2f64 extract element 1 is always custom lowered to unpack high to low
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// and extract element 0 so the non-store version isn't too horrible.
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def MOVHPSmr : PSI<0x17, MRMDestMem, (ops f64mem:$dst, VR128:$src),
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"movhps {$src, $dst|$dst, $src}", []>;
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"movhps {$src, $dst|$dst, $src}",
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[(store (f64 (vector_extract
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(v2f64 (vector_shuffle
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(bc_v2f64 (v4f32 VR128:$src)), (undef),
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UNPCKH_shuffle_mask)), (i32 0))),
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addr:$dst)]>;
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def MOVHPDmr : PDI<0x17, MRMDestMem, (ops f64mem:$dst, VR128:$src),
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"movhpd {$src, $dst|$dst, $src}",
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[(store (f64 (vector_extract
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@ -1703,31 +1712,60 @@ def : Pat<(v2i64 (bitconvert (v8i16 VR128:$src))), (v2i64 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v2i64 (bitconvert (v16i8 VR128:$src))), (v2i64 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v2i64 (bitconvert (v2f64 VR128:$src))), (v2i64 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v2i64 (bitconvert (v4f32 VR128:$src))), (v2i64 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4i32 (bitconvert (v2i64 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4i32 (bitconvert (v8i16 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4i32 (bitconvert (v16i8 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4i32 (bitconvert (v2f64 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4i32 (bitconvert (v4f32 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v8i16 (bitconvert (v2i64 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v8i16 (bitconvert (v4i32 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v8i16 (bitconvert (v16i8 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v8i16 (bitconvert (v2f64 VR128:$src))), (v8i16 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v8i16 (bitconvert (v4f32 VR128:$src))), (v8i16 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v16i8 (bitconvert (v2i64 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v16i8 (bitconvert (v4i32 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v16i8 (bitconvert (v8i16 VR128:$src))), (v4i32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4i32 (bitconvert (v4f32 VR128:$src))), (v4i32 VR128:$src)>,
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def : Pat<(v16i8 (bitconvert (v2f64 VR128:$src))), (v16i8 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v16i8 (bitconvert (v4f32 VR128:$src))), (v16i8 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4f32 (bitconvert (v2i64 VR128:$src))), (v4f32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4f32 (bitconvert (v4i32 VR128:$src))), (v4f32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4f32 (bitconvert (v8i16 VR128:$src))), (v4f32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4f32 (bitconvert (v16i8 VR128:$src))), (v4f32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v4f32 (bitconvert (v2f64 VR128:$src))), (v4f32 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v2f64 (bitconvert (v2i64 VR128:$src))), (v2f64 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v2f64 (bitconvert (v4i32 VR128:$src))), (v2f64 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v2f64 (bitconvert (v8i16 VR128:$src))), (v2f64 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v2f64 (bitconvert (v16i8 VR128:$src))), (v2f64 VR128:$src)>,
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Requires<[HasSSE2]>;
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def : Pat<(v2f64 (bitconvert (v4f32 VR128:$src))), (v2f64 VR128:$src)>,
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Requires<[HasSSE2]>;
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// Zeroing a VR128 then do a MOVS* to the lower bits.
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def : Pat<(v2f64 (X86zexts2vec FR64:$src)),
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