Remove code copied from GenRegisterInfo.inc.

There's no apparent reason this code was copied from generated source
into a .cpp. It sets a bad example for those working on other targets
and trying to understand the register info API.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175849 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Andrew Trick 2013-02-22 01:15:08 +00:00
parent 46e0d1d58c
commit 667754e239
2 changed files with 0 additions and 57 deletions

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@ -291,58 +291,6 @@ void HexagonRegisterInfo::getInitialFrameState(std::vector<MachineMove>
Moves.push_back(MachineMove(0, Dst, Src));
}
// Get the weight in units of pressure for this register class.
const RegClassWeight &
HexagonRegisterInfo::getRegClassWeight(const TargetRegisterClass *RC) const {
// Each TargetRegisterClass has a per register weight, and weight
// limit which must be less than the limits of its pressure sets.
static const RegClassWeight RCWeightTable[] = {
{1, 32}, // IntRegs
{1, 8}, // CRRegs
{1, 4}, // PredRegs
{2, 16}, // DoubleRegs
{0, 0} };
return RCWeightTable[RC->getID()];
}
/// Get the number of dimensions of register pressure.
unsigned HexagonRegisterInfo::getNumRegPressureSets() const {
return 4;
}
/// Get the name of this register unit pressure set.
const char *HexagonRegisterInfo::getRegPressureSetName(unsigned Idx) const {
static const char *const RegPressureSetName[] = {
"IntRegsRegSet",
"CRRegsRegSet",
"PredRegsRegSet",
"DoubleRegsRegSet"
};
assert((Idx < 4) && "Index out of bounds");
return RegPressureSetName[Idx];
}
/// Get the register unit pressure limit for this dimension.
/// This limit must be adjusted dynamically for reserved registers.
unsigned HexagonRegisterInfo::getRegPressureSetLimit(unsigned Idx) const {
static const int RegPressureLimit [] = { 16, 4, 2, 8 };
assert((Idx < 4) && "Index out of bounds");
return RegPressureLimit[Idx];
}
const int*
HexagonRegisterInfo::getRegClassPressureSets(const TargetRegisterClass *RC)
const {
static const int RCSetsTable[] = {
0, -1, // IntRegs
1, -1, // CRRegs
2, -1, // PredRegs
0, -1, // DoubleRegs
-1 };
static const unsigned RCSetStartTable[] = { 0, 2, 4, 6, 0 };
unsigned SetListStart = RCSetStartTable[RC->getID()];
return &RCSetsTable[SetListStart];
}
unsigned HexagonRegisterInfo::getEHExceptionRegister() const {
llvm_unreachable("What is the exception register");
}

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@ -84,11 +84,6 @@ struct HexagonRegisterInfo : public HexagonGenRegisterInfo {
// Exception handling queries.
unsigned getEHExceptionRegister() const;
unsigned getEHHandlerRegister() const;
const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const;
unsigned getNumRegPressureSets() const;
const char *getRegPressureSetName(unsigned Idx) const;
unsigned getRegPressureSetLimit(unsigned Idx) const;
const int* getRegClassPressureSets(const TargetRegisterClass *RC) const;
};
} // end namespace llvm