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Change Thumb2 jumptable codegen to one that uses two level jumps:
Before: adr r12, #LJTI3_0_0 ldr pc, [r12, +r0, lsl #2] LJTI3_0_0: .long LBB3_24 .long LBB3_30 .long LBB3_31 .long LBB3_32 After: adr r12, #LJTI3_0_0 add pc, r12, +r0, lsl #2 LJTI3_0_0: b.w LBB3_24 b.w LBB3_30 b.w LBB3_31 b.w LBB3_32 This has several advantages. 1. This will make it easier to optimize this to a TBB / TBH instruction + (smaller) table. 2. This eliminate the need for ugly asm printer hack to force the address into thumb addresses (bit 0 is one). 3. Same codegen for pic and non-pic. 4. This eliminate the need to align the table so constantpool island pass won't have to over-estimate the size. Based on my calculation, the later is probably slightly faster as well since ldr pc with shifter address is very slow. That is, it should be a win as long as the HW implementation can do a reasonable job of branch predict the second branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77024 91177308-0d34-0410-b5e6-96231b3b80d8
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@@ -402,6 +402,7 @@ const char *ARMTargetLowering::getTargetNodeName(unsigned Opcode) const {
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case ARMISD::tCALL: return "ARMISD::tCALL";
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case ARMISD::BRCOND: return "ARMISD::BRCOND";
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case ARMISD::BR_JT: return "ARMISD::BR_JT";
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case ARMISD::BR2_JT: return "ARMISD::BR2_JT";
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case ARMISD::RET_FLAG: return "ARMISD::RET_FLAG";
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case ARMISD::PIC_ADD: return "ARMISD::PIC_ADD";
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case ARMISD::CMP: return "ARMISD::CMP";
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@@ -1704,15 +1705,27 @@ SDValue ARMTargetLowering::LowerBR_JT(SDValue Op, SelectionDAG &DAG) {
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SDValue UId = DAG.getConstant(AFI->createJumpTableUId(), PTy);
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SDValue JTI = DAG.getTargetJumpTable(JT->getIndex(), PTy);
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Table = DAG.getNode(ARMISD::WrapperJT, dl, MVT::i32, JTI, UId);
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if (Subtarget->isThumb2()) {
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// Thumb2 uses a two-level jump. That is, it jumps into the jump table
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// which does another jump to the destination. This also makes it easier
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// to translate it to TBB / TBH later.
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// FIXME: This might not work if the function is extremely large.
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return DAG.getNode(ARMISD::BR2_JT, dl, MVT::Other, Chain, Table, Index,
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JTI, UId);
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}
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Index = DAG.getNode(ISD::MUL, dl, PTy, Index, DAG.getConstant(4, PTy));
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SDValue Addr = DAG.getNode(ISD::ADD, dl, PTy, Index, Table);
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bool isPIC = getTargetMachine().getRelocationModel() == Reloc::PIC_;
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Addr = DAG.getLoad(isPIC ? (MVT)MVT::i32 : PTy, dl,
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Chain, Addr, NULL, 0);
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Chain = Addr.getValue(1);
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if (isPIC)
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if (getTargetMachine().getRelocationModel() == Reloc::PIC_) {
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Addr = DAG.getLoad((MVT)MVT::i32, dl, Chain, Addr, NULL, 0);
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Chain = Addr.getValue(1);
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Addr = DAG.getNode(ISD::ADD, dl, PTy, Addr, Table);
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return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId);
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return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId);
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} else {
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Addr = DAG.getLoad(PTy, dl, Chain, Addr, NULL, 0);
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Chain = Addr.getValue(1);
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return DAG.getNode(ARMISD::BR_JT, dl, MVT::Other, Chain, Addr, JTI, UId);
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}
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}
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static SDValue LowerFP_TO_INT(SDValue Op, SelectionDAG &DAG) {
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