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[AVX] Revert 124910 until clients are ready.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@124912 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -60,128 +60,6 @@ STATISTIC(NumTailCalls, "Number of tail calls");
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static SDValue getMOVL(SelectionDAG &DAG, DebugLoc dl, EVT VT, SDValue V1,
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SDValue V2);
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static SDValue Insert128BitVector(SDValue Result,
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SDValue Vec,
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SDValue Idx,
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SelectionDAG &DAG,
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DebugLoc dl);
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static SDValue Extract128BitVector(SDValue Vec,
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SDValue Idx,
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SelectionDAG &DAG,
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DebugLoc dl);
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static SDValue ConcatVectors(SDValue Lower, SDValue Upper, SelectionDAG &DAG);
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/// Generate a DAG to grab 128-bits from a vector > 128 bits. This
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/// sets things up to match to an AVX VEXTRACTF128 instruction or a
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/// simple subregister reference.
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static SDValue Extract128BitVector(SDValue Vec,
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SDValue Idx,
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SelectionDAG &DAG,
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DebugLoc dl) {
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EVT VT = Vec.getValueType();
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assert(VT.getSizeInBits() == 256 && "Unexpected vector size!");
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EVT ElVT = VT.getVectorElementType();
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int Factor = VT.getSizeInBits() / 128;
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EVT ResultVT = EVT::getVectorVT(*DAG.getContext(),
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ElVT,
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VT.getVectorNumElements() / Factor);
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// Extract from UNDEF is UNDEF.
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if (Vec.getOpcode() == ISD::UNDEF)
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return DAG.getNode(ISD::UNDEF, dl, ResultVT);
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if (isa<ConstantSDNode>(Idx)) {
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unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
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// Extract the relevant 128 bits. Generate an EXTRACT_SUBVECTOR
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// we can match to VEXTRACTF128.
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unsigned ElemsPerChunk = 128 / ElVT.getSizeInBits();
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// This is the index of the first element of the 128-bit chunk
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// we want.
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unsigned NormalizedIdxVal = (((IdxVal * ElVT.getSizeInBits()) / 128)
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* ElemsPerChunk);
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SDValue VecIdx = DAG.getConstant(NormalizedIdxVal, MVT::i32);
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SDValue Result = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, ResultVT, Vec,
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VecIdx);
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return Result;
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}
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return SDValue();
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}
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/// Generate a DAG to put 128-bits into a vector > 128 bits. This
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/// sets things up to match to an AVX VINSERTF128 instruction or a
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/// simple superregister reference.
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static SDValue Insert128BitVector(SDValue Result,
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SDValue Vec,
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SDValue Idx,
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SelectionDAG &DAG,
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DebugLoc dl) {
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if (isa<ConstantSDNode>(Idx)) {
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EVT VT = Vec.getValueType();
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assert(VT.getSizeInBits() == 128 && "Unexpected vector size!");
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EVT ElVT = VT.getVectorElementType();
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unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
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EVT ResultVT = Result.getValueType();
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// Insert the relevant 128 bits.
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unsigned ElemsPerChunk = 128 / ElVT.getSizeInBits();
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// This is the index of the first element of the 128-bit chunk
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// we want.
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unsigned NormalizedIdxVal = (((IdxVal * ElVT.getSizeInBits()) / 128)
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* ElemsPerChunk);
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SDValue VecIdx = DAG.getConstant(NormalizedIdxVal, MVT::i32);
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Result = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, ResultVT, Result, Vec,
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VecIdx);
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return Result;
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}
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return SDValue();
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}
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/// Given two vectors, concat them.
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static SDValue ConcatVectors(SDValue Lower, SDValue Upper, SelectionDAG &DAG) {
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DebugLoc dl = Lower.getDebugLoc();
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assert(Lower.getValueType() == Upper.getValueType() && "Mismatched vectors!");
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EVT VT = EVT::getVectorVT(*DAG.getContext(),
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Lower.getValueType().getVectorElementType(),
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Lower.getValueType().getVectorNumElements() * 2);
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// TODO: Generalize to arbitrary vector length (this assumes 256-bit vectors).
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assert(VT.getSizeInBits() == 256 && "Unsupported vector concat!");
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// Insert the upper subvector.
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SDValue Vec = Insert128BitVector(DAG.getNode(ISD::UNDEF, dl, VT), Upper,
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DAG.getConstant(
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// This is half the length of the result
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// vector. Start inserting the upper 128
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// bits here.
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Lower.getValueType().
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getVectorNumElements(),
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MVT::i32),
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DAG, dl);
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// Insert the lower subvector.
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Vec = Insert128BitVector(Vec, Lower, DAG.getConstant(0, MVT::i32), DAG, dl);
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return Vec;
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}
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static TargetLoweringObjectFile *createTLOF(X86TargetMachine &TM) {
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const X86Subtarget *Subtarget = &TM.getSubtarget<X86Subtarget>();
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bool is64Bit = Subtarget->is64Bit();
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