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https://github.com/c64scene-ar/llvm-6502.git
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Vector fneg must be expanded into fsub -0.0, X.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40586 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -259,6 +259,7 @@ PPCTargetLowering::PPCTargetLowering(PPCTargetMachine &TM)
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setOperationAction(ISD::UDIV, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::UREM, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::FDIV, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::FNEG, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::EXTRACT_VECTOR_ELT, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::INSERT_VECTOR_ELT, (MVT::ValueType)VT, Expand);
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setOperationAction(ISD::BUILD_VECTOR, (MVT::ValueType)VT, Expand);
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@ -523,6 +524,16 @@ bool PPC::isSplatShuffleMask(SDNode *N, unsigned EltSize) {
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return true;
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}
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/// isAllNegativeZeroVector - Returns true if all elements of build_vector
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/// are -0.0.
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bool PPC::isAllNegativeZeroVector(SDNode *N) {
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assert(N->getOpcode() == ISD::BUILD_VECTOR);
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if (PPC::isSplatShuffleMask(N, N->getNumOperands()))
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if (ConstantFPSDNode *CFP = dyn_cast<ConstantFPSDNode>(N))
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return CFP->isExactlyValue(-0.0);
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return false;
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}
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/// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the
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/// specified isSplatShuffleMask VECTOR_SHUFFLE mask.
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unsigned PPC::getVSPLTImmediate(SDNode *N, unsigned EltSize) {
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@ -160,6 +160,10 @@ namespace llvm {
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/// VSPLTB/VSPLTH/VSPLTW.
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bool isSplatShuffleMask(SDNode *N, unsigned EltSize);
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/// isAllNegativeZeroVector - Returns true if all elements of build_vector
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/// are -0.0.
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bool isAllNegativeZeroVector(SDNode *N);
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/// getVSPLTImmediate - Return the appropriate VSPLT* immediate to splat the
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/// specified isSplatShuffleMask VECTOR_SHUFFLE mask.
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unsigned getVSPLTImmediate(SDNode *N, unsigned EltSize);
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@ -70,7 +70,6 @@ def VMRGHW_unary_shuffle_mask : PatLeaf<(build_vector), [{
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return PPC::isVMRGHShuffleMask(N, 4, true);
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}]>;
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def VSLDOI_get_imm : SDNodeXForm<build_vector, [{
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return getI32Imm(PPC::isVSLDOIShuffleMask(N, false));
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}]>;
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@ -133,6 +132,10 @@ def vecspltisw : PatLeaf<(build_vector), [{
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return PPC::get_VSPLTI_elt(N, 4, *CurDAG).Val != 0;
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}], VSPLTISW_get_imm>;
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def V_immneg0 : PatLeaf<(build_vector), [{
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return PPC::isAllNegativeZeroVector(N);
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}]>;
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//===----------------------------------------------------------------------===//
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// Helpers for defining instructions that directly correspond to intrinsics.
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@ -228,7 +231,8 @@ def VMADDFP : VAForm_1<46, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vC, VRRC:$vB),
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Requires<[FPContractions]>;
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def VNMSUBFP: VAForm_1<47, (outs VRRC:$vD), (ins VRRC:$vA, VRRC:$vC, VRRC:$vB),
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"vnmsubfp $vD, $vA, $vC, $vB", VecFP,
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[(set VRRC:$vD, (fneg (fsub (fmul VRRC:$vA, VRRC:$vC),
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[(set VRRC:$vD, (fsub V_immneg0,
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(fsub (fmul VRRC:$vA, VRRC:$vC),
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VRRC:$vB)))]>,
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Requires<[FPContractions]>;
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