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Add support in the disassembler for ignoring the L-bit on certain VEX instructions. Mark instructions that have this behavior. Fixes PR10676.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141065 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Craig Topper
2011-10-04 06:30:42 +00:00
parent f143b79b78
commit 6744a17dcf
11 changed files with 184 additions and 77 deletions
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27
test/MC/Disassembler/X86/simple-tests.txt
View File

@@ -395,3 +395,30 @@
# CHECK: rdrandq %rax
0x48 0x0f 0xc7 0xf0
# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
0xc4 0xe3 0x7d 0x0a 0xc0 0x00
# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
0xc4 0xe3 0x7d 0x0b 0xc0 0x00
# CHECK: vcvtsd2si %xmm0, %eax
0xc4 0xe1 0x7f 0x2d 0xc0
# CHECK: vcvtsd2si %xmm0, %rax
0xc4 0xe1 0xff 0x2d 0xc0
# CHECK: vucomisd %xmm1, %xmm0
0xc5 0xfd 0x2e 0xc1
# CHECK: vucomiss %xmm1, %xmm0
0xc5 0xfc 0x2e 0xc1
# CHECK: vcomisd %xmm1, %xmm0
0xc5 0xfd 0x2f 0xc1
# CHECK: vcomiss %xmm1, %xmm0
0xc5 0xfc 0x2f 0xc1
# CHECK: vaddss %xmm1, %xmm0, %xmm0
0xc5 0xfe 0x58 0xc1

27
test/MC/Disassembler/X86/x86-32.txt
View File

@@ -405,3 +405,30 @@
# CHECK: rdrandl %eax
0x0f 0xc7 0xf0
# CHECK: vroundss $0, %xmm0, %xmm0, %xmm0
0xc4 0xe3 0x7d 0x0a 0xc0 0x00
# CHECK: vroundsd $0, %xmm0, %xmm0, %xmm0
0xc4 0xe3 0x7d 0x0b 0xc0 0x00
# CHECK: vcvtsd2si %xmm0, %eax
0xc4 0xe1 0x7f 0x2d 0xc0
# CHECK: vcvtsd2si %xmm0, %eax
0xc4 0xe1 0xff 0x2d 0xc0
# CHECK: vucomisd %xmm1, %xmm0
0xc5 0xfd 0x2e 0xc1
# CHECK: vucomiss %xmm1, %xmm0
0xc5 0xfc 0x2e 0xc1
# CHECK: vcomisd %xmm1, %xmm0
0xc5 0xfd 0x2f 0xc1
# CHECK: vcomiss %xmm1, %xmm0
0xc5 0xfc 0x2f 0xc1
# CHECK: vaddss %xmm1, %xmm0, %xmm0
0xc5 0xfe 0x58 0xc1