Teach instcombine to transform a bitcast/(zext|trunc)/bitcast sequence

with a vector input and output into a shuffle vector.  This sort of 
sequence happens when the input code stores with one type and reloads
with another type and then SROA promotes to i96 integers, which make
everyone sad.

This fixes rdar://7896024



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@103354 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner
2010-05-08 21:50:26 +00:00
parent 7944c21cae
commit 6745191070
2 changed files with 103 additions and 0 deletions
+33
View File
@@ -605,3 +605,36 @@ define i64 @test59(i8 %A, i8 %B) nounwind {
; CHECK-NOT: i32
; CHECK: ret i64 %H
}
define <3 x i32> @test60(<4 x i32> %call4) nounwind {
%tmp11 = bitcast <4 x i32> %call4 to i128
%tmp9 = trunc i128 %tmp11 to i96
%tmp10 = bitcast i96 %tmp9 to <3 x i32>
ret <3 x i32> %tmp10
; CHECK: @test60
; CHECK-NEXT: shufflevector
; CHECK-NEXT: ret
}
define <4 x i32> @test61(<3 x i32> %call4) nounwind {
%tmp11 = bitcast <3 x i32> %call4 to i96
%tmp9 = zext i96 %tmp11 to i128
%tmp10 = bitcast i128 %tmp9 to <4 x i32>
ret <4 x i32> %tmp10
; CHECK: @test61
; CHECK-NEXT: shufflevector
; CHECK-NEXT: ret
}
define <4 x i32> @test62(<3 x float> %call4) nounwind {
%tmp11 = bitcast <3 x float> %call4 to i96
%tmp9 = zext i96 %tmp11 to i128
%tmp10 = bitcast i128 %tmp9 to <4 x i32>
ret <4 x i32> %tmp10
; CHECK: @test62
; CHECK-NEXT: bitcast
; CHECK-NEXT: shufflevector
; CHECK-NEXT: ret
}