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Add missing check when MatchInstructionImpl() reports failure
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209802 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -3794,6 +3794,8 @@ bool AArch64AsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
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case Match_InvalidLabel:
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case Match_MSR:
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case Match_MRS: {
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if (ErrorInfo >= Operands.size())
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return Error(IDLoc, "too few operands for instruction");
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// Any time we get here, there's nothing fancy to do. Just get the
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// operand SMLoc and display the diagnostic.
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SMLoc ErrorLoc = ((AArch64Operand *)Operands[ErrorInfo])->getStartLoc();
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@ -395,6 +395,7 @@
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cmn w11, w12, lsr #-1
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cmn w11, w12, lsr #32
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cmn w19, wzr, asr #-1
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cmn wsp, w0
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cmn wzr, wzr, asr #32
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cmn x9, x10, lsl #-1
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cmn x9, x10, lsl #64
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@ -417,6 +418,9 @@
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// CHECK-ERROR-NEXT: error: expected integer shift amount
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// CHECK-ERROR-NEXT: cmn w19, wzr, asr #-1
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// CHECK-ERROR-NEXT: ^
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// CHECK-ERROR-NEXT: error: too few operands for instruction
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// CHECK-ERROR-NEXT: cmn wsp, w0
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// CHECK-ERROR-NEXT: ^
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// CHECK-ERROR-NEXT: error: expected 'lsl', 'lsr' or 'asr' with optional integer in range [0, 31]
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// CHECK-ERROR-NEXT: cmn wzr, wzr, asr #32
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// CHECK-ERROR-NEXT: ^
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