6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-13 20:32:21 +00:00
Code Issues Projects Releases Wiki Activity

ARM IAS: support .even directive

Browse Source 
The .even directive aligns content to an evan-numbered address.  This is an ARM
specific directive applicable to any section.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198031 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Saleem Abdulrasool 2013-12-26 01:52:28 +00:00
parent 76a1dca38d
commit 6841860532
2 changed files with 95 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
lib/Target/ARM/AsmParser/ARMAsmParser.cpp
View File

@ -31,6 +31,7 @@
#include "llvm/MC/MCInst.h" #include "llvm/MC/MCInst.h"
#include "llvm/MC/MCInstrDesc.h" #include "llvm/MC/MCInstrDesc.h"
#include "llvm/MC/MCInstrInfo.h" #include "llvm/MC/MCInstrInfo.h"
#include "llvm/MC/MCSection.h"
#include "llvm/MC/MCParser/MCAsmLexer.h" #include "llvm/MC/MCParser/MCAsmLexer.h"
#include "llvm/MC/MCParser/MCAsmParser.h" #include "llvm/MC/MCParser/MCAsmParser.h"
#include "llvm/MC/MCParser/MCParsedAsmOperand.h" #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
@ -227,6 +228,7 @@ class ARMAsmParser : public MCTargetAsmParser {
bool parseDirectiveRegSave(SMLoc L, bool IsVector); bool parseDirectiveRegSave(SMLoc L, bool IsVector);
bool parseDirectiveInst(SMLoc L, char Suffix = '\0'); bool parseDirectiveInst(SMLoc L, char Suffix = '\0');
bool parseDirectiveLtorg(SMLoc L); bool parseDirectiveLtorg(SMLoc L);
bool parseDirectiveEven(SMLoc L);
StringRef splitMnemonic(StringRef Mnemonic, unsigned &PredicationCode, StringRef splitMnemonic(StringRef Mnemonic, unsigned &PredicationCode,
bool &CarrySetting, unsigned &ProcessorIMod, bool &CarrySetting, unsigned &ProcessorIMod,
@ -7912,6 +7914,8 @@ bool ARMAsmParser::ParseDirective(AsmToken DirectiveID) {
return parseDirectiveInst(DirectiveID.getLoc(), 'w'); return parseDirectiveInst(DirectiveID.getLoc(), 'w');
else if (IDVal == ".ltorg" || IDVal == ".pool") else if (IDVal == ".ltorg" || IDVal == ".pool")
return parseDirectiveLtorg(DirectiveID.getLoc()); return parseDirectiveLtorg(DirectiveID.getLoc());
else if (IDVal == ".even")
return parseDirectiveEven(DirectiveID.getLoc());
return true; return true;
} }
@ -8476,6 +8480,27 @@ bool ARMAsmParser::parseDirectiveLtorg(SMLoc L) {
return false; return false;
} }
bool ARMAsmParser::parseDirectiveEven(SMLoc L) {
const MCSection *Section = getStreamer().getCurrentSection().first;
if (getLexer().isNot(AsmToken::EndOfStatement)) {
TokError("unexpected token in directive");
return false;
}
if (!Section) {
getStreamer().InitToTextSection();
Section = getStreamer().getCurrentSection().first;
}
if (Section->UseCodeAlign())
getStreamer().EmitCodeAlignment(2, 0);
else
getStreamer().EmitValueToAlignment(2, 0, 1, 0);
return false;
}
/// Force static initialization. /// Force static initialization.
extern "C" void LLVMInitializeARMAsmParser() { extern "C" void LLVMInitializeARMAsmParser() {
RegisterMCAsmParser<ARMAsmParser> X(TheARMTarget); RegisterMCAsmParser<ARMAsmParser> X(TheARMTarget);

70
test/MC/ARM/directive-even.s Normal file
View File

@ -0,0 +1,70 @@
@ RUN: llvm-mc -triple armv7-eabi -filetype obj -o - %s | llvm-readobj -s -sd \
@ RUN: | FileCheck %s
.syntax unified
.text
.even
.global aligned_function
.type aligned_function,%function
aligned_function:
bkpt
.space 5
.even
.global unaligned_function
.type unaligned_function,%function
unaligned_function:
bkpt
@ CHECK: Section {
@ CHECK: Name: .text
@ CHECK: SectionData (
@ CHECK: 0000: 700020E1 00000000 00007000 20E1
@ CHECK: )
@ CHECK: }
.data
.space 15
.even
.global classifiable
.type classifiable,%object
classifiable:
.byte 0xf1
.byte 0x51
.byte 0xa5
.byte 0xc1
.byte 0x00
.byte 0x00
.byte 0x1e
.byte 0xab
.even
.global declassified
.type declassified,%object
declassified:
.byte 0x51
.byte 0xa5
.byte 0xc1
.byte 0xde
.byte 0x00
.byte 0x00
.byte 0xed
.byte 0xf1
@ CHECK: Section {
@ CHECK: Name: .data
@ CHECK: SectionData (
@ CHECK: 0000: 00000000 00000000 00000000 00000000
@ CHECK: 0010: F151A5C1 00001EAB 51A5C1DE 0000EDF1
@ CHECK: )
@ CHECK: }