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Change RET node to include signness information of the return values. i.e.

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RET chain, value1, sign1, value2, sign2, ...


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28510 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Evan Cheng
2006-05-26 23:10:12 +00:00
parent 8e7d056bc5
commit 6848be1a27
6 changed files with 13 additions and 13 deletions
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6
lib/Target/Sparc/SparcISelDAGToDAG.cpp
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@@ -857,7 +857,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
abort();
case 1:
return SDOperand(); // ret void is legal
case 2: {
case 3: {
unsigned ArgReg;
switch(Op.getOperand(1).getValueType()) {
default: assert(0 && "Unknown type to return!");
@@ -869,8 +869,8 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) {
SDOperand());
break;
}
case 3:
Copy = DAG.getCopyToReg(Op.getOperand(0), SP::I0, Op.getOperand(2),
case 5:
Copy = DAG.getCopyToReg(Op.getOperand(0), SP::I0, Op.getOperand(3),
SDOperand());
Copy = DAG.getCopyToReg(Copy, SP::I1, Op.getOperand(1), Copy.getValue(1));
break;