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https://github.com/c64scene-ar/llvm-6502.git
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Just use a single isMoveInstr to catch all the cases.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77173 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -490,16 +490,21 @@ ARMBaseInstrInfo::isMoveInstr(const MachineInstr &MI,
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unsigned& SrcSubIdx, unsigned& DstSubIdx) const {
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SrcSubIdx = DstSubIdx = 0; // No sub-registers.
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unsigned oc = MI.getOpcode();
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if (oc == ARM::FCPYS ||
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oc == ARM::FCPYD ||
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oc == ARM::VMOVD ||
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oc == ARM::VMOVQ) {
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switch (MI.getOpcode()) {
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case ARM::FCPYS:
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case ARM::FCPYD:
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case ARM::VMOVD:
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case ARM::VMOVQ: {
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SrcReg = MI.getOperand(1).getReg();
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DstReg = MI.getOperand(0).getReg();
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return true;
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}
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else if (oc == getOpcode(ARMII::MOVr)) {
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case ARM::MOVr:
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case ARM::tMOVr:
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case ARM::tMOVgpr2tgpr:
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case ARM::tMOVtgpr2gpr:
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case ARM::tMOVgpr2gpr:
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case ARM::t2MOVr: {
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assert(MI.getDesc().getNumOperands() >= 2 &&
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MI.getOperand(0).isReg() &&
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MI.getOperand(1).isReg() &&
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@ -508,6 +513,7 @@ ARMBaseInstrInfo::isMoveInstr(const MachineInstr &MI,
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DstReg = MI.getOperand(0).getReg();
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return true;
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}
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}
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return false;
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}
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@ -71,29 +71,6 @@ Thumb1InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
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return false;
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}
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bool Thumb1InstrInfo::isMoveInstr(const MachineInstr &MI,
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unsigned &SrcReg, unsigned &DstReg,
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unsigned& SrcSubIdx, unsigned& DstSubIdx) const {
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SrcSubIdx = DstSubIdx = 0; // No sub-registers.
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unsigned oc = MI.getOpcode();
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switch (oc) {
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default:
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return false;
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case ARM::tMOVr:
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case ARM::tMOVgpr2tgpr:
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case ARM::tMOVtgpr2gpr:
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case ARM::tMOVgpr2gpr:
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assert(MI.getDesc().getNumOperands() >= 2 &&
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MI.getOperand(0).isReg() &&
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MI.getOperand(1).isReg() &&
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"Invalid Thumb MOV instruction");
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SrcReg = MI.getOperand(1).getReg();
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DstReg = MI.getOperand(0).getReg();
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return true;
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}
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}
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unsigned Thumb1InstrInfo::isLoadFromStackSlot(const MachineInstr *MI,
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int &FrameIndex) const {
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switch (MI->getOpcode()) {
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@ -50,9 +50,6 @@ public:
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MachineBasicBlock::iterator MI,
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const std::vector<CalleeSavedInfo> &CSI) const;
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bool isMoveInstr(const MachineInstr &MI,
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unsigned &SrcReg, unsigned &DstReg,
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unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
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unsigned isLoadFromStackSlot(const MachineInstr *MI,
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int &FrameIndex) const;
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unsigned isStoreToStackSlot(const MachineInstr *MI,
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