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Add new function MachineInstrInfo::CreateZeroExtensionInstructions.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@3582 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -299,15 +299,31 @@ public:
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// Create instruction sequence to produce a sign-extended register value
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// Create instruction sequence to produce a sign-extended register value
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// from an arbitrary sized value (sized in bits, not bytes).
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// from an arbitrary sized value (sized in bits, not bytes).
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// The generated instructions are appended to `mvec'.
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// Any temp. registers (TmpInstruction) created are recorded in mcfi.
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// Any stack space required is allocated via mcff.
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// Any stack space required is allocated via mcff.
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//
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//
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virtual void CreateSignExtensionInstructions(const TargetMachine& target,
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virtual void CreateSignExtensionInstructions(const TargetMachine& target,
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Function* F,
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Function* F,
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Value* unsignedSrcVal,
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Value* srcVal,
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unsigned int srcSizeInBits,
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unsigned int srcSizeInBits,
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Value* dest,
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Value* dest,
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std::vector<MachineInstr*>& mvec,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi)const=0;
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MachineCodeForInstruction& mcfi) const=0;
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// Create instruction sequence to produce a zero-extended register value
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// from an arbitrary sized value (sized in bits, not bytes).
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// The generated instructions are appended to `mvec'.
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// Any temp. registers (TmpInstruction) created are recorded in mcfi.
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// Any stack space required is allocated via mcff.
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//
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virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
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Function* F,
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Value* srcVal,
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unsigned int srcSizeInBits,
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Value* dest,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const=0;
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};
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};
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#endif
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#endif
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@ -299,15 +299,31 @@ public:
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// Create instruction sequence to produce a sign-extended register value
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// Create instruction sequence to produce a sign-extended register value
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// from an arbitrary sized value (sized in bits, not bytes).
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// from an arbitrary sized value (sized in bits, not bytes).
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// The generated instructions are appended to `mvec'.
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// Any temp. registers (TmpInstruction) created are recorded in mcfi.
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// Any stack space required is allocated via mcff.
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// Any stack space required is allocated via mcff.
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//
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//
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virtual void CreateSignExtensionInstructions(const TargetMachine& target,
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virtual void CreateSignExtensionInstructions(const TargetMachine& target,
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Function* F,
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Function* F,
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Value* unsignedSrcVal,
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Value* srcVal,
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unsigned int srcSizeInBits,
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unsigned int srcSizeInBits,
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Value* dest,
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Value* dest,
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std::vector<MachineInstr*>& mvec,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi)const=0;
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MachineCodeForInstruction& mcfi) const=0;
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// Create instruction sequence to produce a zero-extended register value
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// from an arbitrary sized value (sized in bits, not bytes).
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// The generated instructions are appended to `mvec'.
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// Any temp. registers (TmpInstruction) created are recorded in mcfi.
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// Any stack space required is allocated via mcff.
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//
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virtual void CreateZeroExtensionInstructions(const TargetMachine& target,
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Function* F,
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Value* srcVal,
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unsigned int srcSizeInBits,
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Value* dest,
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std::vector<MachineInstr*>& mvec,
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MachineCodeForInstruction& mcfi) const=0;
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};
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};
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#endif
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#endif
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