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Need to special case splat after all. Make the second operand of splat
vector_shuffle undef. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@27250 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -2397,21 +2397,21 @@ SDOperand X86TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) {
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MVT::ValueType VT = Op.getValueType();
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unsigned NumElems = PermMask.getNumOperands();
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if (X86::isUNPCKLMask(PermMask.Val) ||
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X86::isUNPCKHMask(PermMask.Val))
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// Leave the VECTOR_SHUFFLE alone. It matches {P}UNPCKL*.
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return SDOperand();
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// PSHUFD's 2nd vector must be undef.
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if (MVT::isInteger(VT) && X86::isPSHUFDMask(PermMask.Val)) {
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// Splat && PSHUFD's 2nd vector must be undef.
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if (X86::isSplatMask(PermMask.Val) ||
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((MVT::isInteger(VT) && X86::isPSHUFDMask(PermMask.Val)))) {
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if (V2.getOpcode() != ISD::UNDEF)
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return DAG.getNode(ISD::VECTOR_SHUFFLE, VT, V1,
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DAG.getNode(ISD::UNDEF, V1.getValueType()),PermMask);
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return SDOperand();
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}
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if (X86::isUNPCKLMask(PermMask.Val) ||
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X86::isUNPCKHMask(PermMask.Val))
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// Leave the VECTOR_SHUFFLE alone. It matches {P}UNPCKL*.
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return SDOperand();
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if (NumElems == 2 ||
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X86::isSplatMask(PermMask.Val) ||
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X86::isSHUFPMask(PermMask.Val)) {
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return NormalizeVectorShuffle(V1, V2, PermMask, VT, DAG);
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}
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@ -58,9 +58,9 @@ def SHUFFLE_get_shuf_imm : SDNodeXForm<build_vector, [{
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return getI8Imm(X86::getShuffleSHUFImmediate(N));
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}]>;
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def v2f64_v2i64_splat_mask : PatLeaf<(build_vector), [{
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def SSE_splat_mask : PatLeaf<(build_vector), [{
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return X86::isSplatMask(N);
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}]>;
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}], SHUFFLE_get_shuf_imm>;
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def MOVLHPS_shuffle_mask : PatLeaf<(build_vector), [{
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return X86::isMOVLHPSMask(N);
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@ -1375,13 +1375,16 @@ def : Pat<(v16i8 (X86zexts2vec R8:$src)),
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(MOVZD128rr (V_SET0_PI), (MOVZX32rr8 R8:$src))>, Requires<[HasSSE2]>;
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// Splat v2f64 / v2i64
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def : Pat<(vector_shuffle (v2f64 VR128:$src), (v2f64 VR128:$src),
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v2f64_v2i64_splat_mask:$sm),
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(v2f64 (UNPCKLPDrr VR128:$src, VR128:$src))>, Requires<[HasSSE2]>;
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def : Pat<(vector_shuffle (v2i64 VR128:$src), (v2i64 VR128:$src),
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v2f64_v2i64_splat_mask:$sm),
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def : Pat<(vector_shuffle (v2f64 VR128:$src), (undef), SSE_splat_mask:$sm),
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(v2f64 (UNPCKLPDrr VR128:$src, VR128:$src))>, Requires<[HasSSE2]>;
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def : Pat<(vector_shuffle (v2i64 VR128:$src), (undef), SSE_splat_mask:$sm),
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(v2i64 (PUNPCKLQDQrr VR128:$src, VR128:$src))>, Requires<[HasSSE2]>;
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// Splat v4f32
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def : Pat<(vector_shuffle (v4f32 VR128:$src), (undef), SSE_splat_mask:$sm),
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(v4f32 (SHUFPSrr VR128:$src, VR128:$src, SSE_splat_mask:$sm))>,
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Requires<[HasSSE1]>;
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// Shuffle v4i32 if others do not match
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def : Pat<(vector_shuffle (v4i32 VR128:$src1), (v4i32 VR128:$src2),
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SHUFP_shuffle_mask:$sm),
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