mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2026-04-20 16:17:38 +00:00
Move the ARM specific parts of the ELF writer to Target/ARM.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@147115 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Rafael Espindola
+1
-241
@@ -25,11 +25,9 @@
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/ELF.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "../Target/Mips/MCTargetDesc/MipsFixupKinds.h"
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#include "../Target/ARM/MCTargetDesc/ARMFixupKinds.h"
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#include "../Target/PowerPC/MCTargetDesc/PPCFixupKinds.h"
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#include <vector>
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@@ -1260,9 +1258,8 @@ MCObjectWriter *llvm::createELFObjectWriter(MCELFObjectTargetWriter *MOTW,
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switch (MOTW->getEMachine()) {
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case ELF::EM_386:
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case ELF::EM_X86_64:
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return new ELFObjectWriter(MOTW, OS, IsLittleEndian); break;
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case ELF::EM_ARM:
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return new ARMELFObjectWriter(MOTW, OS, IsLittleEndian); break;
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return new ELFObjectWriter(MOTW, OS, IsLittleEndian); break;
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case ELF::EM_MBLAZE:
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return new MBlazeELFObjectWriter(MOTW, OS, IsLittleEndian); break;
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case ELF::EM_PPC:
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@@ -1284,243 +1281,6 @@ unsigned ELFObjectWriter::GetRelocType(const MCValue &Target,
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}
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/// START OF SUBCLASSES for ELFObjectWriter
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//===- ARMELFObjectWriter -------------------------------------------===//
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ARMELFObjectWriter::ARMELFObjectWriter(MCELFObjectTargetWriter *MOTW,
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raw_ostream &_OS,
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bool IsLittleEndian)
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: ELFObjectWriter(MOTW, _OS, IsLittleEndian)
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{}
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ARMELFObjectWriter::~ARMELFObjectWriter()
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{}
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// FIXME: get the real EABI Version from the Triple.
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unsigned ARMELFObjectWriter::getEFlags() const {
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return ELF::EF_ARM_EABIMASK & DefaultEABIVersion;
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}
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// In ARM, _MergedGlobals and other most symbols get emitted directly.
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// I.e. not as an offset to a section symbol.
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// This code is an approximation of what ARM/gcc does.
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STATISTIC(PCRelCount, "Total number of PIC Relocations");
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STATISTIC(NonPCRelCount, "Total number of non-PIC relocations");
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const MCSymbol *ARMELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,
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const MCValue &Target,
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const MCFragment &F,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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const MCSymbol &Symbol = Target.getSymA()->getSymbol();
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bool EmitThisSym = false;
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const MCSectionELF &Section =
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static_cast<const MCSectionELF&>(Symbol.getSection());
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bool InNormalSection = true;
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unsigned RelocType = 0;
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RelocType = GetRelocTypeInner(Target, Fixup, IsPCRel);
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DEBUG(
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const MCSymbolRefExpr::VariantKind Kind = Target.getSymA()->getKind();
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MCSymbolRefExpr::VariantKind Kind2;
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Kind2 = Target.getSymB() ? Target.getSymB()->getKind() :
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MCSymbolRefExpr::VK_None;
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dbgs() << "considering symbol "
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<< Section.getSectionName() << "/"
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<< Symbol.getName() << "/"
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<< " Rel:" << (unsigned)RelocType
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<< " Kind: " << (int)Kind << "/" << (int)Kind2
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<< " Tmp:"
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<< Symbol.isAbsolute() << "/" << Symbol.isDefined() << "/"
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<< Symbol.isVariable() << "/" << Symbol.isTemporary()
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<< " Counts:" << PCRelCount << "/" << NonPCRelCount << "\n");
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if (IsPCRel) { ++PCRelCount;
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switch (RelocType) {
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default:
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// Most relocation types are emitted as explicit symbols
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InNormalSection =
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StringSwitch<bool>(Section.getSectionName())
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.Case(".data.rel.ro.local", false)
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.Case(".data.rel", false)
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.Case(".bss", false)
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.Default(true);
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EmitThisSym = true;
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break;
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case ELF::R_ARM_ABS32:
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// But things get strange with R_ARM_ABS32
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// In this case, most things that go in .rodata show up
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// as section relative relocations
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InNormalSection =
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StringSwitch<bool>(Section.getSectionName())
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.Case(".data.rel.ro.local", false)
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.Case(".data.rel", false)
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.Case(".rodata", false)
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.Case(".bss", false)
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.Default(true);
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EmitThisSym = false;
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break;
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}
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} else {
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NonPCRelCount++;
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InNormalSection =
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StringSwitch<bool>(Section.getSectionName())
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.Case(".data.rel.ro.local", false)
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.Case(".rodata", false)
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.Case(".data.rel", false)
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.Case(".bss", false)
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.Default(true);
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switch (RelocType) {
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default: EmitThisSym = true; break;
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case ELF::R_ARM_ABS32: EmitThisSym = false; break;
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}
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}
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if (EmitThisSym)
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return &Symbol;
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if (! Symbol.isTemporary() && InNormalSection) {
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return &Symbol;
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}
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return NULL;
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}
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// Need to examine the Fixup when determining whether to
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// emit the relocation as an explicit symbol or as a section relative
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// offset
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unsigned ARMELFObjectWriter::GetRelocType(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel,
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bool IsRelocWithSymbol,
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int64_t Addend) const {
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return GetRelocTypeInner(Target, Fixup, IsPCRel);
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}
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unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
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const MCFixup &Fixup,
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bool IsPCRel) const {
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MCSymbolRefExpr::VariantKind Modifier = Target.isAbsolute() ?
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MCSymbolRefExpr::VK_None : Target.getSymA()->getKind();
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unsigned Type = 0;
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if (IsPCRel) {
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switch ((unsigned)Fixup.getKind()) {
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default: assert(0 && "Unimplemented");
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case FK_Data_4:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier");
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_REL32;
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break;
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case MCSymbolRefExpr::VK_ARM_TLSGD:
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assert(0 && "unimplemented");
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break;
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case MCSymbolRefExpr::VK_ARM_GOTTPOFF:
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Type = ELF::R_ARM_TLS_IE32;
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break;
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}
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break;
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case ARM::fixup_arm_uncondbranch:
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switch (Modifier) {
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case MCSymbolRefExpr::VK_ARM_PLT:
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Type = ELF::R_ARM_PLT32;
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break;
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default:
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Type = ELF::R_ARM_CALL;
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break;
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}
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break;
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case ARM::fixup_arm_condbranch:
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Type = ELF::R_ARM_JUMP24;
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break;
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case ARM::fixup_arm_movt_hi16:
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case ARM::fixup_arm_movt_hi16_pcrel:
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Type = ELF::R_ARM_MOVT_PREL;
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break;
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case ARM::fixup_arm_movw_lo16:
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case ARM::fixup_arm_movw_lo16_pcrel:
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Type = ELF::R_ARM_MOVW_PREL_NC;
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break;
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case ARM::fixup_t2_movt_hi16:
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case ARM::fixup_t2_movt_hi16_pcrel:
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Type = ELF::R_ARM_THM_MOVT_PREL;
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break;
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case ARM::fixup_t2_movw_lo16:
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case ARM::fixup_t2_movw_lo16_pcrel:
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Type = ELF::R_ARM_THM_MOVW_PREL_NC;
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break;
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_blx:
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switch (Modifier) {
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case MCSymbolRefExpr::VK_ARM_PLT:
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Type = ELF::R_ARM_THM_CALL;
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break;
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default:
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Type = ELF::R_ARM_NONE;
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break;
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}
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break;
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}
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} else {
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switch ((unsigned)Fixup.getKind()) {
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default: llvm_unreachable("invalid fixup kind!");
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case FK_Data_4:
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switch (Modifier) {
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default: llvm_unreachable("Unsupported Modifier"); break;
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case MCSymbolRefExpr::VK_ARM_GOT:
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Type = ELF::R_ARM_GOT_BREL;
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break;
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case MCSymbolRefExpr::VK_ARM_TLSGD:
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Type = ELF::R_ARM_TLS_GD32;
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break;
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case MCSymbolRefExpr::VK_ARM_TPOFF:
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Type = ELF::R_ARM_TLS_LE32;
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break;
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case MCSymbolRefExpr::VK_ARM_GOTTPOFF:
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Type = ELF::R_ARM_TLS_IE32;
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break;
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case MCSymbolRefExpr::VK_None:
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Type = ELF::R_ARM_ABS32;
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break;
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case MCSymbolRefExpr::VK_ARM_GOTOFF:
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Type = ELF::R_ARM_GOTOFF32;
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break;
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}
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break;
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case ARM::fixup_arm_ldst_pcrel_12:
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case ARM::fixup_arm_pcrel_10:
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case ARM::fixup_arm_adr_pcrel_12:
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case ARM::fixup_arm_thumb_bl:
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case ARM::fixup_arm_thumb_cb:
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case ARM::fixup_arm_thumb_cp:
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case ARM::fixup_arm_thumb_br:
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assert(0 && "Unimplemented");
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break;
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case ARM::fixup_arm_uncondbranch:
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Type = ELF::R_ARM_CALL;
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break;
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case ARM::fixup_arm_condbranch:
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Type = ELF::R_ARM_JUMP24;
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break;
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case ARM::fixup_arm_movt_hi16:
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Type = ELF::R_ARM_MOVT_ABS;
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break;
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case ARM::fixup_arm_movw_lo16:
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Type = ELF::R_ARM_MOVW_ABS_NC;
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break;
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case ARM::fixup_t2_movt_hi16:
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Type = ELF::R_ARM_THM_MOVT_ABS;
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break;
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case ARM::fixup_t2_movw_lo16:
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Type = ELF::R_ARM_THM_MOVW_ABS_NC;
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break;
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}
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}
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return Type;
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}
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//===- PPCELFObjectWriter -------------------------------------------===//
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PPCELFObjectWriter::PPCELFObjectWriter(MCELFObjectTargetWriter *MOTW,
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