diff --git a/include/llvm/CodeGen/InstrScheduling.h b/include/llvm/CodeGen/InstrScheduling.h index d98f237d83a..cfaa8b05ef4 100644 --- a/include/llvm/CodeGen/InstrScheduling.h +++ b/include/llvm/CodeGen/InstrScheduling.h @@ -12,14 +12,13 @@ #ifndef LLVM_CODEGEN_INSTR_SCHEDULING_H #define LLVM_CODEGEN_INSTR_SCHEDULING_H - #include "llvm/Support/CommandLine.h" #include "llvm/CodeGen/MachineInstr.h" class Method; class SchedulingManager; class TargetMachine; - +class MachineSchedInfo; // Debug option levels for instruction scheduling enum SchedDebugLevel_t { @@ -43,9 +42,8 @@ extern cl::Enum SchedDebugLevel; // are still in SSA form. //--------------------------------------------------------------------------- -bool ScheduleInstructionsWithSSA (Method* method, - const TargetMachine &Target); - +bool ScheduleInstructionsWithSSA(Method* method, const TargetMachine &Target, + const MachineSchedInfo &schedInfo); //--------------------------------------------------------------------------- // Function: ScheduleInstructions diff --git a/include/llvm/CodeGen/Sparc.h b/include/llvm/CodeGen/Sparc.h index 97caeeb97d9..83bebbddaf3 100644 --- a/include/llvm/CodeGen/Sparc.h +++ b/include/llvm/CodeGen/Sparc.h @@ -7,27 +7,11 @@ #ifndef LLVM_CODEGEN_SPARC_H #define LLVM_CODEGEN_SPARC_H -#include "llvm/CodeGen/TargetMachine.h" +class TargetMachine; -//--------------------------------------------------------------------------- -// class UltraSparcMachine -// -// Purpose: -// Primary interface to machine description for the UltraSPARC. -// Primarily just initializes machine-dependent parameters in -// class TargetMachine, and creates machine-dependent subclasses -// for classes such as MachineInstrInfo. -//--------------------------------------------------------------------------- - -class UltraSparc : public TargetMachine { -public: - UltraSparc(); - virtual ~UltraSparc(); - - // compileMethod - For the sparc, we do instruction selection, followed by - // delay slot scheduling, then register allocation. - // - virtual bool compileMethod(Method *M); -}; +// allocateSparcTargetMachine - Allocate and return a subclass of TargetMachine +// that implements the Sparc backend. +// +TargetMachine *allocateSparcTargetMachine(); #endif diff --git a/include/llvm/CodeGen/TargetMachine.h b/include/llvm/CodeGen/TargetMachine.h index 56249dedabd..9a72ff974b9 100644 --- a/include/llvm/CodeGen/TargetMachine.h +++ b/include/llvm/CodeGen/TargetMachine.h @@ -750,21 +750,17 @@ public: int zeroRegNum; // register that gives 0 if any (-1 if none) public: - /*ctor*/ TargetMachine(const string &targetname, - unsigned char PtrSize = 8, unsigned char PtrAl = 8, - unsigned char DoubleAl = 8, unsigned char FloatAl = 4, - unsigned char LongAl = 8, unsigned char IntAl = 4, - unsigned char ShortAl = 2, unsigned char ByteAl = 1) - : TargetName(targetname), - DataLayout(targetname, PtrSize, PtrAl, - DoubleAl, FloatAl, LongAl, IntAl, - ShortAl, ByteAl) { } + TargetMachine(const string &targetname, + unsigned char PtrSize = 8, unsigned char PtrAl = 8, + unsigned char DoubleAl = 8, unsigned char FloatAl = 4, + unsigned char LongAl = 8, unsigned char IntAl = 4, + unsigned char ShortAl = 2, unsigned char ByteAl = 1) + : TargetName(targetname), DataLayout(targetname, PtrSize, PtrAl, + DoubleAl, FloatAl, LongAl, IntAl, + ShortAl, ByteAl) { } + virtual ~TargetMachine() {} - /*dtor*/ virtual ~TargetMachine() {} - - const MachineInstrInfo& getInstrInfo () const { return *machineInstrInfo; } - - const MachineSchedInfo& getSchedInfo() const { return *machineSchedInfo; } + virtual const MachineInstrInfo& getInstrInfo() const = 0; virtual unsigned int findOptimalStorageSize (const Type* ty) const; @@ -774,8 +770,6 @@ public: return (regNum1 == regNum2); } - const MachineRegInfo& getRegInfo() const { return *machineRegInfo; } - // compileMethod - This does everything neccesary to compile a method into the // built in representation. This allows the target to have complete control // over how it does compilation. This does not emit assembly or output @@ -788,14 +782,6 @@ public: // used. // virtual void emitAssembly(Method *M, ostream &OutStr) { /* todo */ } - -protected: - // Description of machine instructions - // Protect so that subclass can control alloc/dealloc - MachineInstrInfo* machineInstrInfo; - MachineSchedInfo* machineSchedInfo; - const MachineRegInfo* machineRegInfo; - }; #endif