From 6a20cf07766e5096ac3d8a1f9cd2e53c7492ce41 Mon Sep 17 00:00:00 2001 From: Bill Wendling Date: Mon, 23 Jul 2007 03:07:27 +0000 Subject: [PATCH] Add missing SSE builtins: __builtin_ia32_cvtss2si64 __builtin_ia32_cvttss2si64 __builtin_ia32_cvtsi642ss __builtin_ia32_cvtsd2si64 __builtin_ia32_cvttsd2si64 __builtin_ia32_cvtsi642sd git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@40411 91177308-0d34-0410-b5e6-96231b3b80d8 --- include/llvm/IntrinsicsX86.td | 14 ++++++++++ lib/Target/X86/X86InstrX86-64.td | 48 +++++++++++++++++++++++++------- 2 files changed, 52 insertions(+), 10 deletions(-) diff --git a/include/llvm/IntrinsicsX86.td b/include/llvm/IntrinsicsX86.td index 0f61e24d925..e53affd3365 100644 --- a/include/llvm/IntrinsicsX86.td +++ b/include/llvm/IntrinsicsX86.td @@ -112,11 +112,18 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". def int_x86_sse_cvtss2si : GCCBuiltin<"__builtin_ia32_cvtss2si">, Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>; + def int_x86_sse_cvtss2si64 : GCCBuiltin<"__builtin_ia32_cvtss2si64">, + Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>; def int_x86_sse_cvttss2si : GCCBuiltin<"__builtin_ia32_cvttss2si">, Intrinsic<[llvm_i32_ty, llvm_v4f32_ty], [IntrNoMem]>; + def int_x86_sse_cvttss2si64 : GCCBuiltin<"__builtin_ia32_cvttss2si64">, + Intrinsic<[llvm_i64_ty, llvm_v4f32_ty], [IntrNoMem]>; def int_x86_sse_cvtsi2ss : GCCBuiltin<"__builtin_ia32_cvtsi2ss">, Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_i32_ty], [IntrNoMem]>; + def int_x86_sse_cvtsi642ss : GCCBuiltin<"__builtin_ia32_cvtsi642ss">, + Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, + llvm_i64_ty], [IntrNoMem]>; } // SIMD load ops @@ -387,11 +394,18 @@ let TargetPrefix = "x86" in { // All intrinsics start with "llvm.x86.". Intrinsic<[llvm_v2f64_ty, llvm_v4f32_ty], [IntrNoMem]>; def int_x86_sse2_cvtsd2si : GCCBuiltin<"__builtin_ia32_cvtsd2si">, Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>; + def int_x86_sse2_cvtsd2si64 : GCCBuiltin<"__builtin_ia32_cvtsd2si64">, + Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>; def int_x86_sse2_cvttsd2si : GCCBuiltin<"__builtin_ia32_cvttsd2si">, Intrinsic<[llvm_i32_ty, llvm_v2f64_ty], [IntrNoMem]>; + def int_x86_sse2_cvttsd2si64 : GCCBuiltin<"__builtin_ia32_cvttsd2si64">, + Intrinsic<[llvm_i64_ty, llvm_v2f64_ty], [IntrNoMem]>; def int_x86_sse2_cvtsi2sd : GCCBuiltin<"__builtin_ia32_cvtsi2sd">, Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, llvm_i32_ty], [IntrNoMem]>; + def int_x86_sse2_cvtsi642sd : GCCBuiltin<"__builtin_ia32_cvtsi642sd">, + Intrinsic<[llvm_v2f64_ty, llvm_v2f64_ty, + llvm_i64_ty], [IntrNoMem]>; def int_x86_sse2_cvtsd2ss : GCCBuiltin<"__builtin_ia32_cvtsd2ss">, Intrinsic<[llvm_v4f32_ty, llvm_v4f32_ty, llvm_v2f64_ty], [IntrNoMem]>; diff --git a/lib/Target/X86/X86InstrX86-64.td b/lib/Target/X86/X86InstrX86-64.td index 6c216da6fe5..16930b42519 100644 --- a/lib/Target/X86/X86InstrX86-64.td +++ b/lib/Target/X86/X86InstrX86-64.td @@ -900,10 +900,12 @@ def CMOVNP64rm : RI<0x4B, MRMSrcMem, // if !parity, GR64 = [mem64] // f64 -> signed i64 def Int_CVTSD2SI64rr: RSDI<0x2D, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), "cvtsd2si{q} {$src, $dst|$dst, $src}", - []>; // TODO: add intrinsic + [(set GR64:$dst, + (int_x86_sse2_cvtsd2si64 VR128:$src))]>; def Int_CVTSD2SI64rm: RSDI<0x2D, MRMSrcMem, (outs GR64:$dst), (ins f128mem:$src), "cvtsd2si{q} {$src, $dst|$dst, $src}", - []>; // TODO: add intrinsic + [(set GR64:$dst, (int_x86_sse2_cvtsd2si64 + (load addr:$src)))]>; def CVTTSD2SI64rr: RSDI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins FR64:$src), "cvttsd2si{q} {$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint FR64:$src))]>; @@ -912,10 +914,13 @@ def CVTTSD2SI64rm: RSDI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f64mem:$src), [(set GR64:$dst, (fp_to_sint (loadf64 addr:$src)))]>; def Int_CVTTSD2SI64rr: RSDI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), "cvttsd2si{q} {$src, $dst|$dst, $src}", - []>; // TODO: add intrinsic + [(set GR64:$dst, + (int_x86_sse2_cvttsd2si64 VR128:$src))]>; def Int_CVTTSD2SI64rm: RSDI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f128mem:$src), "cvttsd2si{q} {$src, $dst|$dst, $src}", - []>; // TODO: add intrinsic + [(set GR64:$dst, + (int_x86_sse2_cvttsd2si64 + (load addr:$src)))]>; // Signed i64 -> f64 def CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg, (outs FR64:$dst), (ins GR64:$src), @@ -928,11 +933,15 @@ let isTwoAddress = 1 in { def Int_CVTSI2SD64rr: RSDI<0x2A, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), "cvtsi2sd{q} {$src2, $dst|$dst, $src2}", - []>; // TODO: add intrinsic + [(set VR128:$dst, + (int_x86_sse2_cvtsi642sd VR128:$src1, + GR64:$src2))]>; def Int_CVTSI2SD64rm: RSDI<0x2A, MRMSrcMem, (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), "cvtsi2sd{q} {$src2, $dst|$dst, $src2}", - []>; // TODO: add intrinsic + [(set VR128:$dst, + (int_x86_sse2_cvtsi642sd VR128:$src1, + (loadi64 addr:$src2)))]>; } // isTwoAddress // Signed i64 -> f32 @@ -956,10 +965,12 @@ def Int_CVTSI2SS64rm: RSSI<0x2A, MRMSrcMem, // f32 -> signed i64 def Int_CVTSS2SI64rr: RSSI<0x2D, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), "cvtss2si{q} {$src, $dst|$dst, $src}", - []>; // TODO: add intrinsic + [(set GR64:$dst, + (int_x86_sse_cvtss2si64 VR128:$src))]>; def Int_CVTSS2SI64rm: RSSI<0x2D, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src), "cvtss2si{q} {$src, $dst|$dst, $src}", - []>; // TODO: add intrinsic + [(set GR64:$dst, (int_x86_sse_cvtss2si64 + (load addr:$src)))]>; def CVTTSS2SI64rr: RSSI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins FR32:$src), "cvttss2si{q} {$src, $dst|$dst, $src}", [(set GR64:$dst, (fp_to_sint FR32:$src))]>; @@ -968,10 +979,27 @@ def CVTTSS2SI64rm: RSSI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src), [(set GR64:$dst, (fp_to_sint (loadf32 addr:$src)))]>; def Int_CVTTSS2SI64rr: RSSI<0x2C, MRMSrcReg, (outs GR64:$dst), (ins VR128:$src), "cvttss2si{q} {$src, $dst|$dst, $src}", - []>; // TODO: add intrinsic + [(set GR64:$dst, + (int_x86_sse_cvttss2si64 VR128:$src))]>; def Int_CVTTSS2SI64rm: RSSI<0x2C, MRMSrcMem, (outs GR64:$dst), (ins f32mem:$src), "cvttss2si{q} {$src, $dst|$dst, $src}", - []>; // TODO: add intrinsic + [(set GR64:$dst, + (int_x86_sse_cvttss2si64 (load addr:$src)))]>; + +let isTwoAddress = 1 in { + def Int_CVTSI642SSrr : RSSI<0x2A, MRMSrcReg, + (outs VR128:$dst), (ins VR128:$src1, GR64:$src2), + "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, + (int_x86_sse_cvtsi642ss VR128:$src1, + GR64:$src2))]>; + def Int_CVTSI642SSrm : RSSI<0x2A, MRMSrcMem, + (outs VR128:$dst), (ins VR128:$src1, i64mem:$src2), + "cvtsi2ss{q} {$src2, $dst|$dst, $src2}", + [(set VR128:$dst, + (int_x86_sse_cvtsi642ss VR128:$src1, + (loadi64 addr:$src2)))]>; +} //===----------------------------------------------------------------------===// // Alias Instructions