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Handle a v2f64 formal parameter that is split between registers and memory
such that the entire second half is in memory. Radar 7855014. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@101181 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1613,10 +1613,8 @@ ARMTargetLowering::GetF64FormalArgument(CCValAssign &VA, CCValAssign &NextVA,
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SDValue ArgValue2;
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if (NextVA.isMemLoc()) {
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unsigned ArgSize = NextVA.getLocVT().getSizeInBits()/8;
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MachineFrameInfo *MFI = MF.getFrameInfo();
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int FI = MFI->CreateFixedObject(ArgSize, NextVA.getLocMemOffset(),
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true, false);
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int FI = MFI->CreateFixedObject(4, NextVA.getLocMemOffset(), true, false);
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// Create load node to retrieve arguments from the stack.
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SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
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@ -1665,14 +1663,22 @@ ARMTargetLowering::LowerFormalArguments(SDValue Chain,
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if (VA.needsCustom()) {
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// f64 and vector types are split up into multiple registers or
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// combinations of registers and stack slots.
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RegVT = MVT::i32;
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if (VA.getLocVT() == MVT::v2f64) {
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SDValue ArgValue1 = GetF64FormalArgument(VA, ArgLocs[++i],
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Chain, DAG, dl);
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VA = ArgLocs[++i]; // skip ahead to next loc
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SDValue ArgValue2 = GetF64FormalArgument(VA, ArgLocs[++i],
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Chain, DAG, dl);
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SDValue ArgValue2;
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if (VA.isMemLoc()) {
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int FI = MFI->CreateFixedObject(8, VA.getLocMemOffset(),
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true, false);
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SDValue FIN = DAG.getFrameIndex(FI, getPointerTy());
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ArgValue2 = DAG.getLoad(MVT::f64, dl, Chain, FIN,
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PseudoSourceValue::getFixedStack(FI), 0,
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false, false, 0);
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} else {
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ArgValue2 = GetF64FormalArgument(VA, ArgLocs[++i],
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Chain, DAG, dl);
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}
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ArgValue = DAG.getNode(ISD::UNDEF, dl, MVT::v2f64);
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ArgValue = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2f64,
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ArgValue, ArgValue1, DAG.getIntPtrConstant(0));
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7
test/CodeGen/ARM/2010-04-13-v2f64SplitArg.ll
Normal file
7
test/CodeGen/ARM/2010-04-13-v2f64SplitArg.ll
Normal file
@ -0,0 +1,7 @@
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; RUN: llc < %s -mtriple=arm-apple-darwin -mcpu=cortex-a8
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; Radar 7855014
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define arm_apcscc void @test1(i32 %f0, i32 %f1, i32 %f2, <4 x i32> %f3) nounwind {
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entry:
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unreachable
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}
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