mirror of
https://github.com/c64scene-ar/llvm-6502.git
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Add Thumb tests for the ARMv8 FP instructions that I recently added.
Also, fix the namespace for two instructions that I missed previously. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186572 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Joey Gouly
parent
9dffd71d0a
commit
6a3d933e16
@ -584,7 +584,7 @@ def VCVTTDH : ADuI<0b11101, 0b11, 0b0011, 0b11, 0,
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}
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multiclass vcvt_inst<string opc, bits<2> rm> {
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let PostEncoderMethod = "" in {
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let PostEncoderMethod = "", DecoderNamespace = "VFPV8" in {
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def SS : ASuInp<0b11101, 0b11, 0b1100, 0b11, 0,
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(outs SPR:$Sd), (ins SPR:$Sm),
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NoItinerary, !strconcat("vcvt", opc, ".s32.f32\t$Sd, $Sm"),
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@ -670,7 +670,7 @@ defm VRINTR : vrint_inst_zrx<"r", 0, 0>;
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defm VRINTX : vrint_inst_zrx<"x", 1, 0>;
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multiclass vrint_inst_anpm<string opc, bits<2> rm> {
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let PostEncoderMethod = "" in {
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let PostEncoderMethod = "", DecoderNamespace = "VFPV8" in {
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def S : ASuInp<0b11101, 0b11, 0b1000, 0b01, 0,
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(outs SPR:$Sd), (ins SPR:$Sm),
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NoItinerary, !strconcat("vrint", opc, ".f32\t$Sd, $Sm"),
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130
test/MC/ARM/thumb-v8fp.s
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130
test/MC/ARM/thumb-v8fp.s
Normal file
@ -0,0 +1,130 @@
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@ RUN: llvm-mc -triple thumbv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
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@ VCVT{B,T}
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vcvtt.f64.f16 d3, s1
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@ CHECK: vcvtt.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
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vcvtt.f16.f64 s5, d12
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@ CHECK: vcvtt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
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vcvtb.f64.f16 d3, s1
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@ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
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vcvtb.f16.f64 s4, d1
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@ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
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it ge
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vcvttge.f64.f16 d3, s1
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@ CHECK: vcvttge.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0xe0,0x3b]
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it gt
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vcvttgt.f16.f64 s5, d12
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@ CHECK: vcvttgt.f16.f64 s5, d12 @ encoding: [0xf3,0xee,0xcc,0x2b]
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it eq
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vcvtbeq.f64.f16 d3, s1
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@ CHECK: vcvtbeq.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
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it lt
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vcvtblt.f16.f64 s4, d1
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@ CHECK: vcvtblt.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
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@ VCVT{A,N,P,M}
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vcvta.s32.f32 s2, s3
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@ CHECK: vcvta.s32.f32 s2, s3 @ encoding: [0xbc,0xfe,0xe1,0x1a]
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vcvta.s32.f64 s2, d3
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@ CHECK: vcvta.s32.f64 s2, d3 @ encoding: [0xbc,0xfe,0xc3,0x1b]
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vcvtn.s32.f32 s6, s23
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@ CHECK: vcvtn.s32.f32 s6, s23 @ encoding: [0xbd,0xfe,0xeb,0x3a]
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vcvtn.s32.f64 s6, d23
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@ CHECK: vcvtn.s32.f64 s6, d23 @ encoding: [0xbd,0xfe,0xe7,0x3b]
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vcvtp.s32.f32 s0, s4
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@ CHECK: vcvtp.s32.f32 s0, s4 @ encoding: [0xbe,0xfe,0xc2,0x0a]
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vcvtp.s32.f64 s0, d4
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@ CHECK: vcvtp.s32.f64 s0, d4 @ encoding: [0xbe,0xfe,0xc4,0x0b]
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vcvtm.s32.f32 s17, s8
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@ CHECK: vcvtm.s32.f32 s17, s8 @ encoding: [0xff,0xfe,0xc4,0x8a]
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vcvtm.s32.f64 s17, d8
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@ CHECK: vcvtm.s32.f64 s17, d8 @ encoding: [0xff,0xfe,0xc8,0x8b]
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vcvta.u32.f32 s2, s3
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@ CHECK: vcvta.u32.f32 s2, s3 @ encoding: [0xbc,0xfe,0x61,0x1a]
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vcvta.u32.f64 s2, d3
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@ CHECK: vcvta.u32.f64 s2, d3 @ encoding: [0xbc,0xfe,0x43,0x1b]
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vcvtn.u32.f32 s6, s23
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@ CHECK: vcvtn.u32.f32 s6, s23 @ encoding: [0xbd,0xfe,0x6b,0x3a]
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vcvtn.u32.f64 s6, d23
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@ CHECK: vcvtn.u32.f64 s6, d23 @ encoding: [0xbd,0xfe,0x67,0x3b]
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vcvtp.u32.f32 s0, s4
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@ CHECK: vcvtp.u32.f32 s0, s4 @ encoding: [0xbe,0xfe,0x42,0x0a]
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vcvtp.u32.f64 s0, d4
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@ CHECK: vcvtp.u32.f64 s0, d4 @ encoding: [0xbe,0xfe,0x44,0x0b]
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vcvtm.u32.f32 s17, s8
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@ CHECK: vcvtm.u32.f32 s17, s8 @ encoding: [0xff,0xfe,0x44,0x8a]
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vcvtm.u32.f64 s17, d8
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@ CHECK: vcvtm.u32.f64 s17, d8 @ encoding: [0xff,0xfe,0x48,0x8b]
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@ VSEL
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vselge.f32 s4, s1, s23
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@ CHECK: vselge.f32 s4, s1, s23 @ encoding: [0x20,0xfe,0xab,0x2a]
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vselge.f64 d30, d31, d23
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@ CHECK: vselge.f64 d30, d31, d23 @ encoding: [0x6f,0xfe,0xa7,0xeb]
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vselgt.f32 s0, s1, s0
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@ CHECK: vselgt.f32 s0, s1, s0 @ encoding: [0x30,0xfe,0x80,0x0a]
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vselgt.f64 d5, d10, d20
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@ CHECK: vselgt.f64 d5, d10, d20 @ encoding: [0x3a,0xfe,0x24,0x5b]
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vseleq.f32 s30, s28, s23
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@ CHECK: vseleq.f32 s30, s28, s23 @ encoding: [0x0e,0xfe,0x2b,0xfa]
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vseleq.f64 d2, d4, d8
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@ CHECK: vseleq.f64 d2, d4, d8 @ encoding: [0x04,0xfe,0x08,0x2b]
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vselvs.f32 s21, s16, s14
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@ CHECK: vselvs.f32 s21, s16, s14 @ encoding: [0x58,0xfe,0x07,0xaa]
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vselvs.f64 d0, d1, d31
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@ CHECK: vselvs.f64 d0, d1, d31 @ encoding: [0x11,0xfe,0x2f,0x0b]
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@ VMAXNM / VMINNM
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vmaxnm.f32 s5, s12, s0
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@ CHECK: vmaxnm.f32 s5, s12, s0 @ encoding: [0xc6,0xfe,0x00,0x2a]
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vmaxnm.f64 d5, d22, d30
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@ CHECK: vmaxnm.f64 d5, d22, d30 @ encoding: [0x86,0xfe,0xae,0x5b]
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vminnm.f32 s0, s0, s12
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@ CHECK: vminnm.f32 s0, s0, s12 @ encoding: [0x80,0xfe,0x46,0x0a]
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vminnm.f64 d4, d6, d9
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@ CHECK: vminnm.f64 d4, d6, d9 @ encoding: [0x86,0xfe,0x49,0x4b]
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@ VRINT{Z,R,X}
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it ge
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vrintzge.f64 d3, d12
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@ CHECK: vrintzge.f64 d3, d12 @ encoding: [0xb6,0xee,0xcc,0x3b]
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vrintz.f32 s3, s24
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@ CHECK: vrintz.f32 s3, s24 @ encoding: [0xf6,0xee,0xcc,0x1a]
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it lt
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vrintrlt.f64 d5, d0
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@ CHECK: vrintrlt.f64 d5, d0 @ encoding: [0xb6,0xee,0x40,0x5b]
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vrintr.f32 s0, s9
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@ CHECK: vrintr.f32 s0, s9 @ encoding: [0xb6,0xee,0x64,0x0a]
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it eq
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vrintxeq.f64 d28, d30
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@ CHECK: vrintxeq.f64 d28, d30 @ encoding: [0xf7,0xee,0x6e,0xcb]
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it vs
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vrintxvs.f32 s10, s14
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@ CHECK: vrintxvs.f32 s10, s14 @ encoding: [0xb7,0xee,0x47,0x5a]
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@ VRINT{A,N,P,M}
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vrinta.f64 d3, d4
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@ CHECK: vrinta.f64 d3, d4 @ encoding: [0xb8,0xfe,0x44,0x3b]
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vrinta.f32 s12, s1
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@ CHECK: vrinta.f32 s12, s1 @ encoding: [0xb8,0xfe,0x60,0x6a]
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vrintn.f64 d3, d4
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@ CHECK: vrintn.f64 d3, d4 @ encoding: [0xb9,0xfe,0x44,0x3b]
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vrintn.f32 s12, s1
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@ CHECK: vrintn.f32 s12, s1 @ encoding: [0xb9,0xfe,0x60,0x6a]
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vrintp.f64 d3, d4
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@ CHECK: vrintp.f64 d3, d4 @ encoding: [0xba,0xfe,0x44,0x3b]
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vrintp.f32 s12, s1
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@ CHECK: vrintp.f32 s12, s1 @ encoding: [0xba,0xfe,0x60,0x6a]
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vrintm.f64 d3, d4
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@ CHECK: vrintm.f64 d3, d4 @ encoding: [0xbb,0xfe,0x44,0x3b]
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vrintm.f32 s12, s1
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@ CHECK: vrintm.f32 s12, s1 @ encoding: [0xbb,0xfe,0x60,0x6a]
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163
test/MC/Disassembler/ARM/thumb-v8fp.txt
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163
test/MC/Disassembler/ARM/thumb-v8fp.txt
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@ -0,0 +1,163 @@
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# RUN: llvm-mc -disassemble -triple thumbv8 -mattr=+v8fp -show-encoding < %s | FileCheck %s
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0xb2 0xee 0xe0 0x3b
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# CHECK: vcvtt.f64.f16 d3, s1
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0xf3 0xee 0xcc 0x2b
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# CHECK: vcvtt.f16.f64 s5, d12
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0xb2 0xee 0x60 0x3b
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# CHECK: vcvtb.f64.f16 d3, s1
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0xb3 0xee 0x41 0x2b
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# CHECK: vcvtb.f16.f64 s4, d1
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0xa8 0xbf # IT block
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0xb2 0xee 0xe0 0x3b
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# CHECK: vcvttge.f64.f16 d3, s1
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0xc8 0xbf # IT block
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0xf3 0xee 0xcc 0x2b
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# CHECK: vcvttgt.f16.f64 s5, d12
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0x08 0xbf # IT block
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0xb2 0xee 0x60 0x3b
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# CHECK: vcvtbeq.f64.f16 d3, s1
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0xb8 0xbf # IT block
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0xb3 0xee 0x41 0x2b
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# CHECK: vcvtblt.f16.f64 s4, d1
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0xbc 0xfe 0xe1 0x1a
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# CHECK: vcvta.s32.f32 s2, s3
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0xbc 0xfe 0xc3 0x1b
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# CHECK: vcvta.s32.f64 s2, d3
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0xbd 0xfe 0xeb 0x3a
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# CHECK: vcvtn.s32.f32 s6, s23
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0xbd 0xfe 0xe7 0x3b
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# CHECK: vcvtn.s32.f64 s6, d23
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0xbe 0xfe 0xc2 0x0a
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# CHECK: vcvtp.s32.f32 s0, s4
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0xbe 0xfe 0xc4 0x0b
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# CHECK: vcvtp.s32.f64 s0, d4
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0xff 0xfe 0xc4 0x8a
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# CHECK: vcvtm.s32.f32 s17, s8
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0xff 0xfe 0xc8 0x8b
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# CHECK: vcvtm.s32.f64 s17, d8
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0xbc 0xfe 0x61 0x1a
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# CHECK: vcvta.u32.f32 s2, s3
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0xbc 0xfe 0x43 0x1b
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# CHECK: vcvta.u32.f64 s2, d3
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0xbd 0xfe 0x6b 0x3a
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# CHECK: vcvtn.u32.f32 s6, s23
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0xbd 0xfe 0x67 0x3b
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# CHECK: vcvtn.u32.f64 s6, d23
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0xbe 0xfe 0x42 0x0a
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# CHECK: vcvtp.u32.f32 s0, s4
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0xbe 0xfe 0x44 0x0b
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# CHECK: vcvtp.u32.f64 s0, d4
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0xff 0xfe 0x44 0x8a
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# CHECK: vcvtm.u32.f32 s17, s8
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0xff 0xfe 0x48 0x8b
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# CHECK: vcvtm.u32.f64 s17, d8
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0x20 0xfe 0xab 0x2a
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# CHECK: vselge.f32 s4, s1, s23
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0x6f 0xfe 0xa7 0xeb
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# CHECK: vselge.f64 d30, d31, d23
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0x30 0xfe 0x80 0x0a
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# CHECK: vselgt.f32 s0, s1, s0
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0x3a 0xfe 0x24 0x5b
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# CHECK: vselgt.f64 d5, d10, d20
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0x0e 0xfe 0x2b 0xfa
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# CHECK: vseleq.f32 s30, s28, s23
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0x04 0xfe 0x08 0x2b
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# CHECK: vseleq.f64 d2, d4, d8
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0x58 0xfe 0x07 0xaa
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# CHECK: vselvs.f32 s21, s16, s14
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0x11 0xfe 0x2f 0x0b
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# CHECK: vselvs.f64 d0, d1, d31
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0xc6 0xfe 0x00 0x2a
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# CHECK: vmaxnm.f32 s5, s12, s0
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0x86 0xfe 0xae 0x5b
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# CHECK: vmaxnm.f64 d5, d22, d30
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0x80 0xfe 0x46 0x0a
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# CHECK: vminnm.f32 s0, s0, s12
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0x86 0xfe 0x49 0x4b
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# CHECK: vminnm.f64 d4, d6, d9
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0xa8 0xbf # IT block
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0xb6 0xee 0xcc 0x3b
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# CHECK: vrintzge.f64 d3, d12
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0xf6 0xee 0xcc 0x1a
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# CHECK: vrintz.f32 s3, s24
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0xb8 0xbf # IT block
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0xb6 0xee 0x40 0x5b
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# CHECK: vrintrlt.f64 d5, d0
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0xb6 0xee 0x64 0x0a
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# CHECK: vrintr.f32 s0, s9
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0x08 0xbf # IT block
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0xf7 0xee 0x6e 0xcb
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# CHECK: vrintxeq.f64 d28, d30
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0x68 0xbf # IT block
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0xb7 0xee 0x47 0x5a
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# CHECK: vrintxvs.f32 s10, s14
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0xb8 0xfe 0x44 0x3b
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# CHECK: vrinta.f64 d3, d4
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0xb8 0xfe 0x60 0x6a
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# CHECK: vrinta.f32 s12, s1
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0xb9 0xfe 0x44 0x3b
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# CHECK: vrintn.f64 d3, d4
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0xb9 0xfe 0x60 0x6a
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# CHECK: vrintn.f32 s12, s1
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0xba 0xfe 0x44 0x3b
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# CHECK: vrintp.f64 d3, d4
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0xba 0xfe 0x60 0x6a
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# CHECK: vrintp.f32 s12, s1
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0xbb 0xfe 0x44 0x3b
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# CHECK: vrintm.f64 d3, d4
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0xbb 0xfe 0x60 0x6a
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# CHECK: vrintm.f32 s12, s1
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