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Remove the skeleton target, it doesn't produce useful code and there are

Browse Source 
other small targets that do that can be learned from.  They also have
the added advantage of being tested :)


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@26243 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Chris Lattner 2006-02-16 23:14:50 +00:00
parent cffbb5174f
commit 6a6eb7b622
14 changed files with 0 additions and 614 deletions
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19
lib/Target/Skeleton/Makefile
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##===- lib/Target/Skeleton/Makefile ------------------------*- Makefile -*-===##
#
# The LLVM Compiler Infrastructure
#
# This file was developed by the LLVM research group and is distributed under
# the University of Illinois Open Source License. See LICENSE.TXT for details.
#
##===----------------------------------------------------------------------===##
LEVEL = ../../..
LIBRARYNAME = LLVMSkeleton
TARGET = Skeleton
# Make sure that tblgen is run, first thing.
BUILT_SOURCES = $(TARGET)GenRegisterInfo.h.inc $(TARGET)GenRegisterNames.inc \
$(TARGET)GenRegisterInfo.inc $(TARGET)GenInstrNames.inc \
$(TARGET)GenInstrInfo.inc
include $(LEVEL)/Makefile.common

18
lib/Target/Skeleton/README.txt
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LLVM Target Skeleton
--------------------
This directory contains a very simple skeleton that can be used as the
starting point for new LLVM targets. Basically, you can take this code
and start filling stuff in.
This directory contains mainly stubs and placeholders; there is no binary
machine code emitter, no assembly writer, and no instruction selector
here. Most of the functions in these files call abort() or fail assertions
on purpose, just to reinforce the fact that they don't work.
The things that are implemented are stubbed out in a pseudo-PowerPC target.
This should give you an idea of what to do, but anything implemented should
be replaced with your target details.
As always, if you're starting a new port, please mention it on the llvmdev
list, and if you have questions, that is a great place to ask.

33
lib/Target/Skeleton/Skeleton.h
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//===-- Skeleton.h - Target private header file -----------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the definitions shared among the various components of the
// Skeleton backend.
//
//===----------------------------------------------------------------------===//
#ifndef TARGET_SKELETON_H
#define TARGET_SKELETON_H
#include <iosfwd>
/// Put prototypes here for functions used to create various passes.
// Defines symbolic enum names for target registers. This defines a mapping
// from register name to register number. These are generated by tblgen from
// your target file.
//
#include "SkeletonGenRegisterNames.inc"
// Defines symbolic enum names for the target instructions.
//
#include "SkeletonGenInstrNames.inc"
#endif

38
lib/Target/Skeleton/Skeleton.td
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//===- Skeleton.td - Describe the Skeleton Target Machine -------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
// Get the target-independent interfaces which we are implementing...
//
include "../Target.td"
//===----------------------------------------------------------------------===//
// Register File Description
//===----------------------------------------------------------------------===//
include "SkeletonRegisterInfo.td"
include "SkeletonInstrInfo.td"
def SkeletonInstrInfo : InstrInfo { }
def Skeleton : Target {
// Pointers are 32-bits in size.
let PointerType = i32;
// Registers that must be saved by a function call go here.
let CalleeSavedRegisters = [R1, R13, R14, R15, R16, R17, R18, R19,
R20, R21, R22, R23, R24, R25, R26, R27, R28, R29, R30, R31, F14, F15,
F16, F17, F18, F19, F20, F21, F22, F23, F24, F25, F26, F27, F28, F29,
F30, F31];
// Pull in Instruction Info:
let InstructionSet = SkeletonInstrInfo;
}

22
lib/Target/Skeleton/SkeletonInstrInfo.cpp
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//===- SkeletonInstrInfo.cpp - Instruction Information ----------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This is where you implement methods for the TargetInstrInfo class.
//
//===----------------------------------------------------------------------===//
#include "SkeletonInstrInfo.h"
#include "llvm/CodeGen/MachineInstrBuilder.h"
#include "SkeletonGenInstrInfo.inc" // Get info from Tablegen
using namespace llvm;
SkeletonInstrInfo::SkeletonInstrInfo()
: TargetInstrInfo(SkeletonInsts,
sizeof(SkeletonInsts)/sizeof(SkeletonInsts[0])){
}

36
lib/Target/Skeleton/SkeletonInstrInfo.h
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//===- SkeletonInstrInfo.h - Instruction Information ------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file is where the target-specific implementation of the TargetInstrInfo
// class goes.
//
//===----------------------------------------------------------------------===//
#ifndef SKELETON_INSTRUCTIONINFO_H
#define SKELETON_INSTRUCTIONINFO_H
#include "llvm/Target/TargetInstrInfo.h"
#include "SkeletonRegisterInfo.h"
namespace llvm {
class SkeletonInstrInfo : public TargetInstrInfo {
const SkeletonRegisterInfo RI;
public:
SkeletonInstrInfo();
/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
/// such, whenever a client has an instance of instruction info, it should
/// always be able to get register info as well (through this method).
///
virtual const MRegisterInfo &getRegisterInfo() const { return RI; }
};
}
#endif

39
lib/Target/Skeleton/SkeletonInstrInfo.td
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//===- SkeletonInstrInfo.td - Describe the Instruction Set ------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// Skeleton instruction information. Fill in stuff here.
//
//===----------------------------------------------------------------------===//
class Format<bits<4> val> {
bits<4> Value = val;
}
// Some of the powerpc instruction formats, plus a pseudo-instruction format:
def Pseudo : Format<0>;
def IForm : Format<1>;
def BForm : Format<2>;
// Look at how other targets factor commonality between instructions.
class SkelInst<string nm, bits<6> opcd, dag ops, Format f> : Instruction {
let Namespace = "Skeleton";
let Name = nm;
let OperandList = ops;
bits<6> Opcode = opcd;
Format Form = f;
bits<4> FormBits = Form.Value;
}
// Pseudo-instructions:
def NOP : SkelInst<"NOP", 0, (ops), Pseudo>; // No-op
def ADJCALLSTACKDOWN : SkelInst<"ADJCALLSTACKDOWN", 0, (ops), Pseudo>;
def ADJCALLSTACKUP : SkelInst<"ADJCALLSTACKUP", 0, (ops), Pseudo>;

31
lib/Target/Skeleton/SkeletonJITInfo.cpp
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//===-- SkeletonCodeEmitter.cpp - JIT Code Emitter --------------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This is a stub for a JIT code generator, which is obviously not implemented.
//
//===----------------------------------------------------------------------===//
#include "SkeletonTargetMachine.h"
using namespace llvm;
/// addPassesToEmitMachineCode - Add passes to the specified pass manager to get
/// machine code emitted. This uses a MachineCodeEmitter object to handle
/// actually outputting the machine code and resolving things like the address
/// of functions. This method should returns true if machine code emission is
/// not supported.
///
bool SkeletonTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
MachineCodeEmitter &MCE){
return true; // Not implemented yet!
}
void SkeletonJITInfo::replaceMachineCodeForFunction (void *Old, void *New) {
assert (0 && "replaceMachineCodeForFunction not implemented");
}

43
lib/Target/Skeleton/SkeletonJITInfo.h
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//===- SkeletonJITInfo.h - Skeleton impl of JIT interface -------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the skeleton implementation of the TargetJITInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef SKELETONJITINFO_H
#define SKELETONJITINFO_H
#include "llvm/Target/TargetJITInfo.h"
namespace llvm {
class TargetMachine;
class IntrinsicLowering;
class SkeletonJITInfo : public TargetJITInfo {
TargetMachine &TM;
public:
SkeletonJITInfo(TargetMachine &tm) : TM(tm) {}
/// addPassesToJITCompile - Add passes to the specified pass manager to
/// implement a fast dynamic compiler for this target. Return true if this
/// is not supported for this target.
///
virtual void addPassesToJITCompile(FunctionPassManager &PM);
/// replaceMachineCodeForFunction - Make it so that calling the function
/// whose machine code is at OLD turns into a call to NEW, perhaps by
/// overwriting OLD with a branch to NEW. This is used for self-modifying
/// code.
///
virtual void replaceMachineCodeForFunction(void *Old, void *New);
};
}
#endif

71
lib/Target/Skeleton/SkeletonRegisterInfo.cpp
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//===- SkeletonRegisterInfo.cpp - Skeleton Register Information -*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the Skeleton implementation of the MRegisterInfo class.
//
//===----------------------------------------------------------------------===//
#include "Skeleton.h"
#include "SkeletonRegisterInfo.h"
#include "llvm/Type.h"
using namespace llvm;
SkeletonRegisterInfo::SkeletonRegisterInfo()
: SkeletonGenRegisterInfo(Skeleton::ADJCALLSTACKDOWN,
Skeleton::ADJCALLSTACKUP) {}
void SkeletonRegisterInfo::
storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned SrcReg, int FrameIdx,
const TargetRegisterClass *RC) const {
abort();
}
void SkeletonRegisterInfo::
loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned DestReg, int FrameIdx,
const TargetRegisterClass *RC) const {
abort();
}
void SkeletonRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const {
abort();
}
void SkeletonRegisterInfo::
eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const {
abort();
}
void SkeletonRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II)
const {
abort();
}
void SkeletonRegisterInfo::
processFunctionBeforeFrameFinalized(MachineFunction &MF) const {
abort();
}
void SkeletonRegisterInfo::emitPrologue(MachineFunction &MF) const {
abort();
}
void SkeletonRegisterInfo::emitEpilogue(MachineFunction &MF,
MachineBasicBlock &MBB) const {
abort();
}
#include "SkeletonGenRegisterInfo.inc"

52
lib/Target/Skeleton/SkeletonRegisterInfo.h
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//===- SkeletonRegisterInfo.h - Skeleton Register Info Impl ------*- C++ -*-==//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file contains the Skeleton implementation of the MRegisterInfo class.
//
//===----------------------------------------------------------------------===//
#ifndef SKELETON_REGISTERINFO_H
#define SKELETON_REGISTERINFO_H
#include "SkeletonGenRegisterInfo.h.inc"
namespace llvm {
class Type;
struct SkeletonRegisterInfo : public SkeletonGenRegisterInfo {
SkeletonRegisterInfo();
void storeRegToStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
unsigned SrcReg, int FrameIndex,
const TargetRegisterClass *RC) const;
void loadRegFromStackSlot(MachineBasicBlock &MBB,
MachineBasicBlock::iterator MBBI,
unsigned DestReg, int FrameIndex,
const TargetRegisterClass *RC) const;
void copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
unsigned DestReg, unsigned SrcReg,
const TargetRegisterClass *RC) const;
void eliminateCallFramePseudoInstr(MachineFunction &MF,
MachineBasicBlock &MBB,
MachineBasicBlock::iterator I) const;
void eliminateFrameIndex(MachineBasicBlock::iterator II) const;
void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
void emitPrologue(MachineFunction &MF) const;
void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
};
} // end namespace llvm
#endif

98
lib/Target/Skeleton/SkeletonRegisterInfo.td
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//===- SkeletonRegisterInfo.td - Describe the Register File -----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file defines the target's register file in Tablegen format.
//
//===----------------------------------------------------------------------===//
class SkelReg<string n> : Register<n> {
let Namespace = "Skeleton";
}
// This is roughly the PPC register file. You should replace all of this with
// whatever your target needs.
// GPR - One of the 32 32-bit general-purpose registers
class GPR<bits<5> num, string n> : SkelReg<n> {
field bits<5> Num = num;
}
// SPR - One of the 32-bit special-purpose registers
class SPR<bits<5> num, string n> : SkelReg<n> {
field bits<5> Num = num;
}
// FPR - One of the 32 64-bit floating-point registers
class FPR<bits<5> num, string n> : SkelReg<n> {
field bits<5> Num = num;
}
// CR - One of the 8 4-bit condition registers
class CR<bits<5> num, string n> : SkelReg<n> {
field bits<5> Num = num;
}
// General-purpose registers
def R0 : GPR< 0, "R0">; def R1 : GPR< 1, "R1">;
def R2 : GPR< 2, "R2">; def R3 : GPR< 3, "R3">;
def R4 : GPR< 4, "R4">; def R5 : GPR< 5, "R5">;
def R6 : GPR< 6, "R6">; def R7 : GPR< 7, "R7">;
def R8 : GPR< 8, "R8">; def R9 : GPR< 9, "R9">;
def R10 : GPR<10, "R10">; def R11 : GPR<11, "R11">;
def R12 : GPR<12, "R12">; def R13 : GPR<13, "R13">;
def R14 : GPR<14, "R14">; def R15 : GPR<15, "R15">;
def R16 : GPR<16, "R16">; def R17 : GPR<17, "R17">;
def R18 : GPR<18, "R18">; def R19 : GPR<19, "R19">;
def R20 : GPR<20, "R20">; def R21 : GPR<21, "R21">;
def R22 : GPR<22, "R22">; def R23 : GPR<23, "R23">;
def R24 : GPR<24, "R24">; def R25 : GPR<25, "R25">;
def R26 : GPR<26, "R26">; def R27 : GPR<27, "R27">;
def R28 : GPR<28, "R28">; def R29 : GPR<29, "R29">;
def R30 : GPR<30, "R30">; def R31 : GPR<31, "R31">;
// Floating-point registers
def F0 : FPR< 0, "F0">; def F1 : FPR< 1, "F1">;
def F2 : FPR< 2, "F2">; def F3 : FPR< 3, "F3">;
def F4 : FPR< 4, "F4">; def F5 : FPR< 5, "F5">;
def F6 : FPR< 6, "F6">; def F7 : FPR< 7, "F7">;
def F8 : FPR< 8, "F8">; def F9 : FPR< 9, "F9">;
def F10 : FPR<10, "F10">; def F11 : FPR<11, "F11">;
def F12 : FPR<12, "F12">; def F13 : FPR<13, "F13">;
def F14 : FPR<14, "F14">; def F15 : FPR<15, "F15">;
def F16 : FPR<16, "F16">; def F17 : FPR<17, "F17">;
def F18 : FPR<18, "F18">; def F19 : FPR<19, "F19">;
def F20 : FPR<20, "F20">; def F21 : FPR<21, "F21">;
def F22 : FPR<22, "F22">; def F23 : FPR<23, "F23">;
def F24 : FPR<24, "F24">; def F25 : FPR<25, "F25">;
def F26 : FPR<26, "F26">; def F27 : FPR<27, "F27">;
def F28 : FPR<28, "F28">; def F29 : FPR<29, "F29">;
def F30 : FPR<30, "F30">; def F31 : FPR<31, "F31">;
// Floating-point status and control register
def FPSCR : SPR<0, "FPSCR">;
// fiXed-point Exception Register? :-)
def XER : SPR<1, "XER">;
// Link register
def LR : SPR<2, "LR">;
// Count register
def CTR : SPR<3, "CTR">;
// These are the "time base" registers which are read-only in user mode.
def TBL : SPR<4, "TBL">;
def TBU : SPR<5, "TBU">;
/// Register classes: one for floats and another for non-floats.
///
def GPRC : RegisterClass<"Skeleton", [i32], 32, [R0, R1, R2, R3, R4, R5, R6, R7,
R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, R21,
R22, R23, R24, R25, R26, R27, R28, R29, R30, R31]>;
def FPRC : RegisterClass<"Skeleton", [f64], 64, [F0, F1, F2, F3, F4, F5, F6, F7,
F8, F9, F10, F11, F12, F13, F14, F15, F16, F17, F18, F19, F20, F21,
F22, F23, F24, F25, F26, F27, F28, F29, F30, F31]>;

62
lib/Target/Skeleton/SkeletonTargetMachine.cpp
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//===-- SkeletonTargetMachine.cpp - Define TargetMachine for Skeleton -----===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
//
//===----------------------------------------------------------------------===//
#include "SkeletonTargetMachine.h"
#include "Skeleton.h"
#include "llvm/Module.h"
#include "llvm/PassManager.h"
#include "llvm/Target/TargetOptions.h"
#include "llvm/Target/TargetMachineRegistry.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/Passes.h"
using namespace llvm;
namespace {
// Register the target.
RegisterTarget<SkeletonTargetMachine> X("skeleton",
" Target Skeleton (unusable)");
}
/// SkeletonTargetMachine ctor - Create an ILP32 architecture model
///
SkeletonTargetMachine::SkeletonTargetMachine(const Module &M,
IntrinsicLowering *IL,
const std::string &FS)
: TargetMachine("Skeleton", IL, true, 4, 4, 4, 4, 4),
FrameInfo(TargetFrameInfo::StackGrowsDown, 8, -4), JITInfo(*this) {
}
/// addPassesToEmitFile - Add passes to the specified pass manager
/// to implement a static compiler for this target.
///
bool SkeletonTargetMachine::addPassesToEmitFile(PassManager &PM,
std::ostream &Out,
CodeGenFileType FileType,
bool Fast) {
if (FileType != TargetMachine::AssemblyFile) return true;
// <insert instruction selector passes here>
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
// <insert assembly code output passes here>
PM.add(createMachineCodeDeleter());
return true; // change to `return false' when this actually works.
}
/// addPassesToJITCompile - Add passes to the specified pass manager to
/// implement a fast dynamic compiler for this target.
///
void SkeletonJITInfo::addPassesToJITCompile(FunctionPassManager &PM) {
// <insert instruction selector passes here>
PM.add(createRegisterAllocator());
PM.add(createPrologEpilogCodeInserter());
}

52
lib/Target/Skeleton/SkeletonTargetMachine.h
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//===-- SkeletonTargetMachine.h - TargetMachine for Skeleton ----*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file was developed by the LLVM research group and is distributed under
// the University of Illinois Open Source License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//
// This file declares the Skeleton specific subclass of TargetMachine.
//
//===----------------------------------------------------------------------===//
#ifndef SKELETONTARGETMACHINE_H
#define SKELETONTARGETMACHINE_H
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/PassManager.h"
#include "SkeletonInstrInfo.h"
#include "SkeletonJITInfo.h"
namespace llvm {
class IntrinsicLowering;
class SkeletonTargetMachine : public TargetMachine {
SkeletonInstrInfo InstrInfo;
TargetFrameInfo FrameInfo;
SkeletonJITInfo JITInfo;
public:
SkeletonTargetMachine(const Module &M, IntrinsicLowering *IL,
const std::string &FS);
virtual const SkeletonInstrInfo *getInstrInfo() const { return &InstrInfo; }
virtual const TargetFrameInfo *getFrameInfo() const { return &FrameInfo; }
virtual const MRegisterInfo *getRegisterInfo() const {
return &InstrInfo.getRegisterInfo();
}
virtual TargetJITInfo *getJITInfo() {
return &JITInfo;
}
virtual bool addPassesToEmitMachineCode(FunctionPassManager &PM,
MachineCodeEmitter &MCE);
virtual bool addPassesToEmitFile(PassManager &PM, std::ostream &Out,
CodeGenFileType FileType, bool Fast);
};
} // end namespace llvm
#endif