From 6aa9775888a9e644a31bb041553de3ddab62c30d Mon Sep 17 00:00:00 2001 From: Bob Wilson Date: Fri, 4 Sep 2009 04:07:19 +0000 Subject: [PATCH] Convert tests to FileCheck. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@80983 91177308-0d34-0410-b5e6-96231b3b80d8 --- test/CodeGen/ARM/vdup.ll | 38 ++++++++++++++++++++++++++++++++++- test/CodeGen/ARM/vdup_lane.ll | 23 ++++++++++++++++----- 2 files changed, 55 insertions(+), 6 deletions(-) diff --git a/test/CodeGen/ARM/vdup.ll b/test/CodeGen/ARM/vdup.ll index 37f8dcbaf5a..0d0087b9733 100644 --- a/test/CodeGen/ARM/vdup.ll +++ b/test/CodeGen/ARM/vdup.ll @@ -1,9 +1,11 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s ; RUN: grep vdup.8 %t | count 4 ; RUN: grep vdup.16 %t | count 4 ; RUN: grep vdup.32 %t | count 10 define <8 x i8> @v_dup8(i8 %A) nounwind { +;CHECK: v_dup8: +;CHECK: vdup.8 %tmp1 = insertelement <8 x i8> zeroinitializer, i8 %A, i32 0 %tmp2 = insertelement <8 x i8> %tmp1, i8 %A, i32 1 %tmp3 = insertelement <8 x i8> %tmp2, i8 %A, i32 2 @@ -16,6 +18,8 @@ define <8 x i8> @v_dup8(i8 %A) nounwind { } define <4 x i16> @v_dup16(i16 %A) nounwind { +;CHECK: v_dup16: +;CHECK: vdup.16 %tmp1 = insertelement <4 x i16> zeroinitializer, i16 %A, i32 0 %tmp2 = insertelement <4 x i16> %tmp1, i16 %A, i32 1 %tmp3 = insertelement <4 x i16> %tmp2, i16 %A, i32 2 @@ -24,18 +28,24 @@ define <4 x i16> @v_dup16(i16 %A) nounwind { } define <2 x i32> @v_dup32(i32 %A) nounwind { +;CHECK: v_dup32: +;CHECK: vdup.32 %tmp1 = insertelement <2 x i32> zeroinitializer, i32 %A, i32 0 %tmp2 = insertelement <2 x i32> %tmp1, i32 %A, i32 1 ret <2 x i32> %tmp2 } define <2 x float> @v_dupfloat(float %A) nounwind { +;CHECK: v_dupfloat: +;CHECK: vdup.32 %tmp1 = insertelement <2 x float> zeroinitializer, float %A, i32 0 %tmp2 = insertelement <2 x float> %tmp1, float %A, i32 1 ret <2 x float> %tmp2 } define <16 x i8> @v_dupQ8(i8 %A) nounwind { +;CHECK: v_dupQ8: +;CHECK: vdup.8 %tmp1 = insertelement <16 x i8> zeroinitializer, i8 %A, i32 0 %tmp2 = insertelement <16 x i8> %tmp1, i8 %A, i32 1 %tmp3 = insertelement <16 x i8> %tmp2, i8 %A, i32 2 @@ -56,6 +66,8 @@ define <16 x i8> @v_dupQ8(i8 %A) nounwind { } define <8 x i16> @v_dupQ16(i16 %A) nounwind { +;CHECK: v_dupQ16: +;CHECK: vdup.16 %tmp1 = insertelement <8 x i16> zeroinitializer, i16 %A, i32 0 %tmp2 = insertelement <8 x i16> %tmp1, i16 %A, i32 1 %tmp3 = insertelement <8 x i16> %tmp2, i16 %A, i32 2 @@ -68,6 +80,8 @@ define <8 x i16> @v_dupQ16(i16 %A) nounwind { } define <4 x i32> @v_dupQ32(i32 %A) nounwind { +;CHECK: v_dupQ32: +;CHECK: vdup.32 %tmp1 = insertelement <4 x i32> zeroinitializer, i32 %A, i32 0 %tmp2 = insertelement <4 x i32> %tmp1, i32 %A, i32 1 %tmp3 = insertelement <4 x i32> %tmp2, i32 %A, i32 2 @@ -76,6 +90,8 @@ define <4 x i32> @v_dupQ32(i32 %A) nounwind { } define <4 x float> @v_dupQfloat(float %A) nounwind { +;CHECK: v_dupQfloat: +;CHECK: vdup.32 %tmp1 = insertelement <4 x float> zeroinitializer, float %A, i32 0 %tmp2 = insertelement <4 x float> %tmp1, float %A, i32 1 %tmp3 = insertelement <4 x float> %tmp2, float %A, i32 2 @@ -86,54 +102,72 @@ define <4 x float> @v_dupQfloat(float %A) nounwind { ; Check to make sure it works with shuffles, too. define <8 x i8> @v_shuffledup8(i8 %A) nounwind { +;CHECK: v_shuffledup8: +;CHECK: vdup.8 %tmp1 = insertelement <8 x i8> undef, i8 %A, i32 0 %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> zeroinitializer ret <8 x i8> %tmp2 } define <4 x i16> @v_shuffledup16(i16 %A) nounwind { +;CHECK: v_shuffledup16: +;CHECK: vdup.16 %tmp1 = insertelement <4 x i16> undef, i16 %A, i32 0 %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> zeroinitializer ret <4 x i16> %tmp2 } define <2 x i32> @v_shuffledup32(i32 %A) nounwind { +;CHECK: v_shuffledup32: +;CHECK: vdup.32 %tmp1 = insertelement <2 x i32> undef, i32 %A, i32 0 %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> zeroinitializer ret <2 x i32> %tmp2 } define <2 x float> @v_shuffledupfloat(float %A) nounwind { +;CHECK: v_shuffledupfloat: +;CHECK: vdup.32 %tmp1 = insertelement <2 x float> undef, float %A, i32 0 %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer ret <2 x float> %tmp2 } define <16 x i8> @v_shuffledupQ8(i8 %A) nounwind { +;CHECK: v_shuffledupQ8: +;CHECK: vdup.8 %tmp1 = insertelement <16 x i8> undef, i8 %A, i32 0 %tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <16 x i32> zeroinitializer ret <16 x i8> %tmp2 } define <8 x i16> @v_shuffledupQ16(i16 %A) nounwind { +;CHECK: v_shuffledupQ16: +;CHECK: vdup.16 %tmp1 = insertelement <8 x i16> undef, i16 %A, i32 0 %tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <8 x i32> zeroinitializer ret <8 x i16> %tmp2 } define <4 x i32> @v_shuffledupQ32(i32 %A) nounwind { +;CHECK: v_shuffledupQ32: +;CHECK: vdup.32 %tmp1 = insertelement <4 x i32> undef, i32 %A, i32 0 %tmp2 = shufflevector <4 x i32> %tmp1, <4 x i32> undef, <4 x i32> zeroinitializer ret <4 x i32> %tmp2 } define <4 x float> @v_shuffledupQfloat(float %A) nounwind { +;CHECK: v_shuffledupQfloat: +;CHECK: vdup.32 %tmp1 = insertelement <4 x float> undef, float %A, i32 0 %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> zeroinitializer ret <4 x float> %tmp2 } define <2 x float> @v_shuffledupfloat2(float* %A) nounwind { +;CHECK: v_shuffledupfloat2: +;CHECK: vdup.32 %tmp0 = load float* %A %tmp1 = insertelement <2 x float> undef, float %tmp0, i32 0 %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> zeroinitializer @@ -141,6 +175,8 @@ define <2 x float> @v_shuffledupfloat2(float* %A) nounwind { } define <4 x float> @v_shuffledupQfloat2(float* %A) nounwind { +;CHECK: v_shuffledupQfloat2: +;CHECK: vdup.32 %tmp0 = load float* %A %tmp1 = insertelement <4 x float> undef, float %tmp0, i32 0 %tmp2 = shufflevector <4 x float> %tmp1, <4 x float> undef, <4 x i32> zeroinitializer diff --git a/test/CodeGen/ARM/vdup_lane.ll b/test/CodeGen/ARM/vdup_lane.ll index c14f864c48e..c720909626a 100644 --- a/test/CodeGen/ARM/vdup_lane.ll +++ b/test/CodeGen/ARM/vdup_lane.ll @@ -1,51 +1,64 @@ -; RUN: llvm-as < %s | llc -march=arm -mattr=+neon > %t -; RUN: grep vdup.8 %t | count 2 -; RUN: grep vdup.16 %t | count 2 -; RUN: grep vdup.32 %t | count 4 +; RUN: llvm-as < %s | llc -march=arm -mattr=+neon | FileCheck %s define <8 x i8> @vduplane8(<8 x i8>* %A) nounwind { +;CHECK: vduplane8: +;CHECK: vdup.8 %tmp1 = load <8 x i8>* %A %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <8 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > ret <8 x i8> %tmp2 } define <4 x i16> @vduplane16(<4 x i16>* %A) nounwind { +;CHECK: vduplane16: +;CHECK: vdup.16 %tmp1 = load <4 x i16>* %A %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ret <4 x i16> %tmp2 } define <2 x i32> @vduplane32(<2 x i32>* %A) nounwind { +;CHECK: vduplane32: +;CHECK: vdup.32 %tmp1 = load <2 x i32>* %A %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <2 x i32> < i32 1, i32 1 > ret <2 x i32> %tmp2 } define <2 x float> @vduplanefloat(<2 x float>* %A) nounwind { +;CHECK: vduplanefloat: +;CHECK: vdup.32 %tmp1 = load <2 x float>* %A %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <2 x i32> < i32 1, i32 1 > ret <2 x float> %tmp2 } define <16 x i8> @vduplaneQ8(<8 x i8>* %A) nounwind { +;CHECK: vduplaneQ8: +;CHECK: vdup.8 %tmp1 = load <8 x i8>* %A %tmp2 = shufflevector <8 x i8> %tmp1, <8 x i8> undef, <16 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > ret <16 x i8> %tmp2 } define <8 x i16> @vduplaneQ16(<4 x i16>* %A) nounwind { +;CHECK: vduplaneQ16: +;CHECK: vdup.16 %tmp1 = load <4 x i16>* %A %tmp2 = shufflevector <4 x i16> %tmp1, <4 x i16> undef, <8 x i32> < i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1 > ret <8 x i16> %tmp2 } define <4 x i32> @vduplaneQ32(<2 x i32>* %A) nounwind { +;CHECK: vduplaneQ32: +;CHECK: vdup.32 %tmp1 = load <2 x i32>* %A %tmp2 = shufflevector <2 x i32> %tmp1, <2 x i32> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ret <4 x i32> %tmp2 } define <4 x float> @vduplaneQfloat(<2 x float>* %A) nounwind { +;CHECK: vduplaneQfloat: +;CHECK: vdup.32 %tmp1 = load <2 x float>* %A %tmp2 = shufflevector <2 x float> %tmp1, <2 x float> undef, <4 x i32> < i32 1, i32 1, i32 1, i32 1 > ret <4 x float> %tmp2 @@ -73,4 +86,4 @@ define arm_apcscc <2 x double> @qux(<2 x double> %arg0_int64x1_t) nounwind readn entry: %0 = shufflevector <2 x double> %arg0_int64x1_t, <2 x double> undef, <2 x i32> ret <2 x double> %0 -} \ No newline at end of file +}