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synced 2024-08-23 02:29:18 +00:00
Turn some insert_subreg, extract_subreg, subreg_to_reg into implicit_defs.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@78151 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -106,6 +106,23 @@ void LiveIntervals::releaseMemory() {
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}
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}
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static bool CanTurnIntoImplicitDef(MachineInstr *MI, unsigned Reg,
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const TargetInstrInfo *tii_) {
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unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
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if (tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
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Reg == SrcReg)
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return true;
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if ((MI->getOpcode() == TargetInstrInfo::INSERT_SUBREG ||
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MI->getOpcode() == TargetInstrInfo::SUBREG_TO_REG) &&
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MI->getOperand(2).getReg() == Reg)
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return true;
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if (MI->getOpcode() == TargetInstrInfo::EXTRACT_SUBREG &&
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MI->getOperand(1).getReg() == Reg)
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return true;
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return false;
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}
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/// processImplicitDefs - Process IMPLICIT_DEF instructions and make sure
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/// there is one implicit_def for each use. Add isUndef marker to
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/// implicit_def defs and their uses.
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@ -132,7 +149,7 @@ void LiveIntervals::processImplicitDefs() {
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bool ChangedToImpDef = false;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand& MO = MI->getOperand(i);
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if (!MO.isReg() || !MO.isUse())
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if (!MO.isReg() || !MO.isUse() || MO.isUndef())
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continue;
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unsigned Reg = MO.getReg();
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if (!Reg)
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@ -140,9 +157,7 @@ void LiveIntervals::processImplicitDefs() {
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if (!ImpDefRegs.count(Reg))
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continue;
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// Use is a copy, just turn it into an implicit_def.
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unsigned SrcReg, DstReg, SrcSubReg, DstSubReg;
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if (tii_->isMoveInstr(*MI, SrcReg, DstReg, SrcSubReg, DstSubReg) &&
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Reg == SrcReg) {
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if (CanTurnIntoImplicitDef(MI, Reg, tii_)) {
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bool isKill = MO.isKill();
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MI->setDesc(tii_->get(TargetInstrInfo::IMPLICIT_DEF));
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for (int j = MI->getNumOperands() - 1, ee = 0; j > ee; --j)
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@ -154,9 +169,16 @@ void LiveIntervals::processImplicitDefs() {
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}
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MO.setIsUndef();
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if (MO.isKill() || MI->isRegTiedToDefOperand(i))
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if (MO.isKill() || MI->isRegTiedToDefOperand(i)) {
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// Make sure other uses of
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for (unsigned j = i+1; j != e; ++j) {
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MachineOperand &MOJ = MI->getOperand(j);
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if (MOJ.isReg() && MOJ.isUse() && MOJ.getReg() == Reg)
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MOJ.setIsUndef();
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}
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ImpDefRegs.erase(Reg);
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}
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}
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if (ChangedToImpDef) {
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// Backtrack to process this new implicit_def.
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@ -119,6 +119,7 @@ bool LowerSubregsInstructionPass::LowerExtract(MachineInstr *MI) {
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"Extract supperg source must be a physical register");
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assert(TargetRegisterInfo::isPhysicalRegister(DstReg) &&
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"Extract destination must be in a physical register");
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assert(SrcReg && "invalid subregister index for register");
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DOUT << "subreg: CONVERTING: " << *MI;
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@ -1,7 +1,4 @@
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; RUN: llvm-as < %s | llc -march=bfin
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; XFAIL: *
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; Assertion failed: (isUsed(Reg) && "Using an undefined register!"),
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; function forward, file RegisterScavenging.cpp, line 182.
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declare i32 @printf(i8*, ...)
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