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[AVX] Implement 256-bit vector lowering for INSERT_VECTOR_ELT.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@125187 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -125,7 +125,9 @@ static SDValue Extract128BitVector(SDValue Vec,
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/// Generate a DAG to put 128-bits into a vector > 128 bits. This
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/// sets things up to match to an AVX VINSERTF128 instruction or a
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/// simple superregister reference.
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/// simple superregister reference. Idx is an index in the 128 bits
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/// we want. It need not be aligned to a 128-bit bounday. That makes
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/// lowering INSERT_VECTOR_ELT operations easier.
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static SDValue Insert128BitVector(SDValue Result,
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SDValue Vec,
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SDValue Idx,
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@ -6027,17 +6029,45 @@ X86TargetLowering::LowerINSERT_VECTOR_ELT(SDValue Op, SelectionDAG &DAG) const {
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EVT VT = Op.getValueType();
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EVT EltVT = VT.getVectorElementType();
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DebugLoc dl = Op.getDebugLoc();
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SDValue N0 = Op.getOperand(0);
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SDValue N1 = Op.getOperand(1);
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SDValue N2 = Op.getOperand(2);
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// If this is a 256-bit vector result, first insert into a 128-bit
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// vector and then insert into the 256-bit vector.
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if (VT.getSizeInBits() > 128) {
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if (!isa<ConstantSDNode>(N2))
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return SDValue();
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// Get the 128-bit vector.
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unsigned NumElems = VT.getVectorNumElements();
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unsigned IdxVal = cast<ConstantSDNode>(N2)->getZExtValue();
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bool Upper = IdxVal >= NumElems / 2;
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SDValue SubN0 = Extract128BitVector(N0, N2, DAG, dl);
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// Insert into it.
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SDValue ScaledN2 = N2;
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if (Upper)
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ScaledN2 = DAG.getNode(ISD::SUB, dl, N2.getValueType(), N2,
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DAG.getConstant(NumElems /
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(VT.getSizeInBits() / 128),
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N2.getValueType()));
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Op = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, SubN0.getValueType(), SubN0,
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N1, ScaledN2);
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// Insert the 128-bit vector
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// FIXME: Why UNDEF?
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return Insert128BitVector(N0, Op, N2, DAG, dl);
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}
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if (Subtarget->hasSSE41())
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return LowerINSERT_VECTOR_ELT_SSE4(Op, DAG);
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if (EltVT == MVT::i8)
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return SDValue();
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DebugLoc dl = Op.getDebugLoc();
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SDValue N0 = Op.getOperand(0);
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SDValue N1 = Op.getOperand(1);
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SDValue N2 = Op.getOperand(2);
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if (EltVT.getSizeInBits() == 16 && isa<ConstantSDNode>(N2)) {
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// Transform it so it match pinsrw which expects a 16-bit value in a GR32
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// as its second argument.
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