diff --git a/lib/CodeGen/MachineLICM.cpp b/lib/CodeGen/MachineLICM.cpp
index f8cbe41b944..bd25b2c6b6a 100644
--- a/lib/CodeGen/MachineLICM.cpp
+++ b/lib/CodeGen/MachineLICM.cpp
@@ -1145,13 +1145,12 @@ bool MachineLICM::IsGuaranteedToExecute(MachineInstr *MI) {
     return true;
 
   // Get the exit blocks for the current loop.
-  SmallVector<MachineBasicBlock*, 8> ExitBlocks;
-  CurLoop->getExitingBlocks(ExitBlocks);
+  SmallVector<MachineBasicBlock*, 8> ExitingBlocks;
+  CurLoop->getExitingBlocks(ExitingBlocks);
 
   // Verify that the block dominates each of the exit blocks of the loop.
-  for (unsigned i = 0, e = ExitBlocks.size(); i != e; ++i)
-    if (ExitBlocks[i] != CurLoop->getHeader() &&
-	!DT->dominates(MI->getParent(), ExitBlocks[i]))
+  for (unsigned i = 0, e = ExitingBlocks.size(); i != e; ++i)
+    if (!DT->dominates(MI->getParent(), ExitingBlocks[i]))
       return false;
 
   return true;
diff --git a/test/CodeGen/X86/sink-hoist.ll b/test/CodeGen/X86/sink-hoist.ll
index 31f41eebc5a..6942b3557ad 100644
--- a/test/CodeGen/X86/sink-hoist.ll
+++ b/test/CodeGen/X86/sink-hoist.ll
@@ -84,65 +84,6 @@ return:
 ;   ret i8 %b_addr.0
 ; }
 
-; Codegen should hoist and CSE these constants.
-
-; CHECK: vv:
-; CHECK: LCPI3_0(%rip), %xmm0
-; CHECK: LCPI3_1(%rip), %xmm1
-; CHECK: LCPI3_2(%rip), %xmm2
-; CHECK: align
-; CHECK-NOT: LCPI
-; CHECK: ret
-
-@_minusZero.6007 = internal constant <4 x float> <float -0.000000e+00, float -0.000000e+00, float -0.000000e+00, float -0.000000e+00> ; <<4 x float>*> [#uses=0]
-@twoTo23.6008 = internal constant <4 x float> <float 8.388608e+06, float 8.388608e+06, float 8.388608e+06, float 8.388608e+06> ; <<4 x float>*> [#uses=0]
-
-define void @vv(float* %y, float* %x, i32* %n) nounwind ssp {
-entry:
-  br label %bb60
-
-bb:                                               ; preds = %bb60
-  %0 = bitcast float* %x_addr.0 to <4 x float>*   ; <<4 x float>*> [#uses=1]
-  %1 = load <4 x float>* %0, align 16             ; <<4 x float>> [#uses=4]
-  %tmp20 = bitcast <4 x float> %1 to <4 x i32>    ; <<4 x i32>> [#uses=1]
-  %tmp22 = and <4 x i32> %tmp20, <i32 2147483647, i32 2147483647, i32 2147483647, i32 2147483647> ; <<4 x i32>> [#uses=1]
-  %tmp23 = bitcast <4 x i32> %tmp22 to <4 x float> ; <<4 x float>> [#uses=1]
-  %tmp25 = bitcast <4 x float> %1 to <4 x i32>    ; <<4 x i32>> [#uses=1]
-  %tmp27 = and <4 x i32> %tmp25, <i32 -2147483648, i32 -2147483648, i32 -2147483648, i32 -2147483648> ; <<4 x i32>> [#uses=2]
-  %tmp30 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %tmp23, <4 x float> <float 8.388608e+06, float 8.388608e+06, float 8.388608e+06, float 8.388608e+06>, i8 5) ; <<4 x float>> [#uses=1]
-  %tmp34 = bitcast <4 x float> %tmp30 to <4 x i32> ; <<4 x i32>> [#uses=1]
-  %tmp36 = xor <4 x i32> %tmp34, <i32 -1, i32 -1, i32 -1, i32 -1> ; <<4 x i32>> [#uses=1]
-  %tmp37 = and <4 x i32> %tmp36, <i32 1258291200, i32 1258291200, i32 1258291200, i32 1258291200> ; <<4 x i32>> [#uses=1]
-  %tmp42 = or <4 x i32> %tmp37, %tmp27            ; <<4 x i32>> [#uses=1]
-  %tmp43 = bitcast <4 x i32> %tmp42 to <4 x float> ; <<4 x float>> [#uses=2]
-  %tmp45 = fadd <4 x float> %1, %tmp43            ; <<4 x float>> [#uses=1]
-  %tmp47 = fsub <4 x float> %tmp45, %tmp43        ; <<4 x float>> [#uses=2]
-  %tmp49 = call <4 x float> @llvm.x86.sse.cmp.ps(<4 x float> %1, <4 x float> %tmp47, i8 1) ; <<4 x float>> [#uses=1]
-  %2 = bitcast <4 x float> %tmp49 to <4 x i32>    ; <<4 x i32>> [#uses=1]
-  %3 = call <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32> %2) nounwind readnone ; <<4 x float>> [#uses=1]
-  %tmp53 = fadd <4 x float> %tmp47, %3            ; <<4 x float>> [#uses=1]
-  %tmp55 = bitcast <4 x float> %tmp53 to <4 x i32> ; <<4 x i32>> [#uses=1]
-  %tmp57 = or <4 x i32> %tmp55, %tmp27            ; <<4 x i32>> [#uses=1]
-  %tmp58 = bitcast <4 x i32> %tmp57 to <4 x float> ; <<4 x float>> [#uses=1]
-  %4 = bitcast float* %y_addr.0 to <4 x float>*   ; <<4 x float>*> [#uses=1]
-  store <4 x float> %tmp58, <4 x float>* %4, align 16
-  %5 = getelementptr float* %x_addr.0, i64 4      ; <float*> [#uses=1]
-  %6 = getelementptr float* %y_addr.0, i64 4      ; <float*> [#uses=1]
-  %7 = add i32 %i.0, 4                            ; <i32> [#uses=1]
-  br label %bb60
-
-bb60:                                             ; preds = %bb, %entry
-  %i.0 = phi i32 [ 0, %entry ], [ %7, %bb ]       ; <i32> [#uses=2]
-  %x_addr.0 = phi float* [ %x, %entry ], [ %5, %bb ] ; <float*> [#uses=2]
-  %y_addr.0 = phi float* [ %y, %entry ], [ %6, %bb ] ; <float*> [#uses=2]
-  %8 = load i32* %n, align 4                      ; <i32> [#uses=1]
-  %9 = icmp sgt i32 %8, %i.0                      ; <i1> [#uses=1]
-  br i1 %9, label %bb, label %return
-
-return:                                           ; preds = %bb60
-  ret void
-}
-
 declare <4 x float> @llvm.x86.sse.cmp.ps(<4 x float>, <4 x float>, i8) nounwind readnone
 
 declare <4 x float> @llvm.x86.sse2.cvtdq2ps(<4 x i32>) nounwind readnone
diff --git a/test/CodeGen/X86/widen_arith-4.ll b/test/CodeGen/X86/widen_arith-4.ll
index 5931d639f19..b8b26e63013 100644
--- a/test/CodeGen/X86/widen_arith-4.ll
+++ b/test/CodeGen/X86/widen_arith-4.ll
@@ -1,5 +1,6 @@
 ; RUN: llc < %s -march=x86-64 -mattr=+sse42 | FileCheck %s
 ; CHECK: psubw
+; CHECK-NEXT: movdqa
 ; CHECK-NEXT: pmullw
 
 ; Widen a v5i16 to v8i16 to do a vector sub and multiple