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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@226888 91177308-0d34-0410-b5e6-96231b3b80d8
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@ -1734,9 +1734,8 @@ MipsAsmParser::expandLoadAddressSym(MCInst &Inst, SMLoc IDLoc,
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}
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}
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bool MipsAsmParser::
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expandUncondBranchMMPseudo(MCInst &Inst, SMLoc IDLoc,
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SmallVectorImpl<MCInst> &Instructions) {
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bool MipsAsmParser::expandUncondBranchMMPseudo(
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MCInst &Inst, SMLoc IDLoc, SmallVectorImpl<MCInst> &Instructions) {
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assert(getInstDesc(Inst.getOpcode()).getNumOperands() == 1 &&
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"unexpected number of operands");
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