From 6c087e5585b227f3c1d8278304c7cfbc7cd4f6e8 Mon Sep 17 00:00:00 2001 From: Evan Cheng Date: Wed, 25 Apr 2007 22:13:27 +0000 Subject: [PATCH] Match MachineFunction::UsedPhysRegs changes. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@36452 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/CodeGen/PrologEpilogInserter.cpp | 5 ++--- lib/CodeGen/RegAllocLinearScan.cpp | 7 +----- lib/CodeGen/RegAllocLocal.cpp | 21 +++++++---------- lib/CodeGen/RegAllocSimple.cpp | 9 ++------ lib/CodeGen/VirtRegMap.cpp | 31 ++++++++++---------------- lib/Target/ARM/ARMRegisterInfo.cpp | 15 +++++-------- lib/Target/PowerPC/PPCRegisterInfo.cpp | 13 +++++------ lib/Target/X86/X86FloatingPoint.cpp | 3 +-- 8 files changed, 38 insertions(+), 66 deletions(-) diff --git a/lib/CodeGen/PrologEpilogInserter.cpp b/lib/CodeGen/PrologEpilogInserter.cpp index d1ed0bbbc30..478f3d3a5f2 100644 --- a/lib/CodeGen/PrologEpilogInserter.cpp +++ b/lib/CodeGen/PrologEpilogInserter.cpp @@ -156,19 +156,18 @@ void PEI::calculateCalleeSavedRegisters(MachineFunction &Fn) { // Now figure out which *callee saved* registers are modified by the current // function, thus needing to be saved and restored in the prolog/epilog. // - const bool *PhysRegsUsed = Fn.getUsedPhysregs(); const TargetRegisterClass* const *CSRegClasses = RegInfo->getCalleeSavedRegClasses(); std::vector CSI; for (unsigned i = 0; CSRegs[i]; ++i) { unsigned Reg = CSRegs[i]; - if (PhysRegsUsed[Reg]) { + if (Fn.isPhysRegUsed(Reg)) { // If the reg is modified, save it! CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i])); } else { for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); *AliasSet; ++AliasSet) { // Check alias registers too. - if (PhysRegsUsed[*AliasSet]) { + if (Fn.isPhysRegUsed(*AliasSet)) { CSI.push_back(CalleeSavedInfo(Reg, CSRegClasses[i])); break; } diff --git a/lib/CodeGen/RegAllocLinearScan.cpp b/lib/CodeGen/RegAllocLinearScan.cpp index f66400c535b..8ad347bb7da 100644 --- a/lib/CodeGen/RegAllocLinearScan.cpp +++ b/lib/CodeGen/RegAllocLinearScan.cpp @@ -61,7 +61,6 @@ namespace { const TargetMachine* tm_; const MRegisterInfo* mri_; LiveIntervals* li_; - bool *PhysRegsUsed; /// handled_ - Intervals are added to the handled_ set in the order of their /// start value. This is uses for backtracking. @@ -194,10 +193,6 @@ bool RA::runOnMachineFunction(MachineFunction &fn) { if (RelatedRegClasses.empty()) ComputeRelatedRegClasses(); - PhysRegsUsed = new bool[mri_->getNumRegs()]; - std::fill(PhysRegsUsed, PhysRegsUsed+mri_->getNumRegs(), false); - fn.setUsedPhysRegs(PhysRegsUsed); - if (!prt_.get()) prt_.reset(new PhysRegTracker(*mri_)); vrm_.reset(new VirtRegMap(*mf_)); if (!spiller_.get()) spiller_.reset(createSpiller()); @@ -231,7 +226,7 @@ void RA::initIntervalSets() for (LiveIntervals::iterator i = li_->begin(), e = li_->end(); i != e; ++i) { if (MRegisterInfo::isPhysicalRegister(i->second.reg)) { - PhysRegsUsed[i->second.reg] = true; + mf_->setPhysRegUsed(i->second.reg); fixed_.push_back(std::make_pair(&i->second, i->second.begin())); } else unhandled_.push(&i->second); diff --git a/lib/CodeGen/RegAllocLocal.cpp b/lib/CodeGen/RegAllocLocal.cpp index f862023e8f8..d3d5796e851 100644 --- a/lib/CodeGen/RegAllocLocal.cpp +++ b/lib/CodeGen/RegAllocLocal.cpp @@ -47,7 +47,6 @@ namespace { MachineFunction *MF; const MRegisterInfo *RegInfo; LiveVariables *LV; - bool *PhysRegsEverUsed; // StackSlotForVirtReg - Maps virtual regs to the frame index where these // values are spilled. @@ -511,7 +510,7 @@ MachineInstr *RA::reloadVirtReg(MachineBasicBlock &MBB, MachineInstr *MI, RegInfo->loadRegFromStackSlot(MBB, MI, PhysReg, FrameIndex, RC); ++NumLoads; // Update statistics - PhysRegsEverUsed[PhysReg] = true; + MF->setPhysRegUsed(PhysReg); MI->getOperand(OpNum).setReg(PhysReg); // Assign the input register return MI; } @@ -532,7 +531,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { for (MachineFunction::livein_iterator I = MF->livein_begin(), E = MF->livein_end(); I != E; ++I) { unsigned Reg = I->first; - PhysRegsEverUsed[Reg] = true; + MF->setPhysRegUsed(Reg); PhysRegsUsed[Reg] = 0; // It is free and reserved now PhysRegsUseOrder.push_back(Reg); for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); @@ -540,7 +539,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { if (PhysRegsUsed[*AliasSet] != -2) { PhysRegsUseOrder.push_back(*AliasSet); PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now - PhysRegsEverUsed[*AliasSet] = true; + MF->setPhysRegUsed(*AliasSet); } } } @@ -630,7 +629,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { unsigned Reg = MO.getReg(); if (PhysRegsUsed[Reg] == -2) continue; // Something like ESP. - PhysRegsEverUsed[Reg] = true; + MF->setPhysRegUsed(Reg); spillPhysReg(MBB, MI, Reg, true); // Spill any existing value in reg PhysRegsUsed[Reg] = 0; // It is free and reserved now PhysRegsUseOrder.push_back(Reg); @@ -639,7 +638,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { if (PhysRegsUsed[*AliasSet] != -2) { PhysRegsUseOrder.push_back(*AliasSet); PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now - PhysRegsEverUsed[*AliasSet] = true; + MF->setPhysRegUsed(*AliasSet); } } } @@ -656,7 +655,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { PhysRegsUseOrder.push_back(Reg); PhysRegsUsed[Reg] = 0; // It is free and reserved now } - PhysRegsEverUsed[Reg] = true; + MF->setPhysRegUsed(Reg); for (const unsigned *AliasSet = RegInfo->getAliasSet(Reg); *AliasSet; ++AliasSet) { @@ -665,7 +664,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { PhysRegsUseOrder.push_back(*AliasSet); PhysRegsUsed[*AliasSet] = 0; // It is free and reserved now } - PhysRegsEverUsed[*AliasSet] = true; + MF->setPhysRegUsed(*AliasSet); } } } @@ -693,7 +692,7 @@ void RA::AllocateBasicBlock(MachineBasicBlock &MBB) { // If DestVirtReg already has a value, use it. if (!(DestPhysReg = getVirt2PhysRegMapSlot(DestVirtReg))) DestPhysReg = getReg(MBB, MI, DestVirtReg); - PhysRegsEverUsed[DestPhysReg] = true; + MF->setPhysRegUsed(DestPhysReg); markVirtRegModified(DestVirtReg); MI->getOperand(i).setReg(DestPhysReg); // Assign the output register } @@ -779,10 +778,6 @@ bool RA::runOnMachineFunction(MachineFunction &Fn) { RegInfo = TM->getRegisterInfo(); LV = &getAnalysis(); - PhysRegsEverUsed = new bool[RegInfo->getNumRegs()]; - std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false); - Fn.setUsedPhysRegs(PhysRegsEverUsed); - PhysRegsUsed.assign(RegInfo->getNumRegs(), -1); // At various places we want to efficiently check to see whether a register diff --git a/lib/CodeGen/RegAllocSimple.cpp b/lib/CodeGen/RegAllocSimple.cpp index e632e3599ac..576d2b421c5 100644 --- a/lib/CodeGen/RegAllocSimple.cpp +++ b/lib/CodeGen/RegAllocSimple.cpp @@ -41,7 +41,6 @@ namespace { MachineFunction *MF; const TargetMachine *TM; const MRegisterInfo *RegInfo; - bool *PhysRegsEverUsed; // StackSlotForVirtReg - Maps SSA Regs => frame index on the stack where // these values are spilled @@ -126,7 +125,7 @@ unsigned RegAllocSimple::getFreeReg(unsigned virtualReg) { unsigned PhysReg = *(RI+regIdx); if (!RegsUsed[PhysReg]) { - PhysRegsEverUsed[PhysReg] = true; + MF->setPhysRegUsed(PhysReg); return PhysReg; } } @@ -178,7 +177,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) { if (Desc.ImplicitDefs) { for (Regs = Desc.ImplicitDefs; *Regs; ++Regs) { RegsUsed[*Regs] = true; - PhysRegsEverUsed[*Regs] = true; + MF->setPhysRegUsed(*Regs); } } @@ -236,10 +235,6 @@ bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) { TM = &MF->getTarget(); RegInfo = TM->getRegisterInfo(); - PhysRegsEverUsed = new bool[RegInfo->getNumRegs()]; - std::fill(PhysRegsEverUsed, PhysRegsEverUsed+RegInfo->getNumRegs(), false); - Fn.setUsedPhysRegs(PhysRegsEverUsed); - // Loop over all of the basic blocks, eliminating virtual register references for (MachineFunction::iterator MBB = Fn.begin(), MBBe = Fn.end(); MBB != MBBe; ++MBB) diff --git a/lib/CodeGen/VirtRegMap.cpp b/lib/CodeGen/VirtRegMap.cpp index 3fb84bdd8f7..482e336f871 100644 --- a/lib/CodeGen/VirtRegMap.cpp +++ b/lib/CodeGen/VirtRegMap.cpp @@ -174,7 +174,6 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) { DOUT << "********** Function: " << MF.getFunction()->getName() << '\n'; const TargetMachine &TM = MF.getTarget(); const MRegisterInfo &MRI = *TM.getRegisterInfo(); - bool *PhysRegsUsed = MF.getUsedPhysregs(); // LoadedRegs - Keep track of which vregs are loaded, so that we only load // each vreg once (in the case where a spilled vreg is used by multiple @@ -214,10 +213,10 @@ bool SimpleSpiller::runOnMachineFunction(MachineFunction &MF, VirtRegMap &VRM) { ++NumStores; } } - PhysRegsUsed[PhysReg] = true; + MF.setPhysRegUsed(PhysReg); MI.getOperand(i).setReg(PhysReg); } else { - PhysRegsUsed[MO.getReg()] = true; + MF.setPhysRegUsed(MO.getReg()); } } @@ -648,8 +647,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, // same stack slot, the original store is deleted. std::map MaybeDeadStores; - bool *PhysRegsUsed = MBB.getParent()->getUsedPhysregs(); - + MachineFunction &MF = *MBB.getParent(); for (MachineBasicBlock::iterator MII = MBB.begin(), E = MBB.end(); MII != E; ) { MachineInstr &MI = *MII; @@ -688,7 +686,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, const unsigned *ImpDef = TID->ImplicitDefs; if (ImpDef) { for ( ; *ImpDef; ++ImpDef) { - PhysRegsUsed[*ImpDef] = true; + MF.setPhysRegUsed(*ImpDef); ReusedOperands.markClobbered(*ImpDef); Spills.ClobberPhysReg(*ImpDef); } @@ -703,7 +701,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, if (MRegisterInfo::isPhysicalRegister(MO.getReg())) { // Ignore physregs for spilling, but remember that it is used by this // function. - PhysRegsUsed[MO.getReg()] = true; + MF.setPhysRegUsed(MO.getReg()); ReusedOperands.markClobbered(MO.getReg()); continue; } @@ -715,7 +713,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, if (!VRM.hasStackSlot(VirtReg)) { // This virtual register was assigned a physreg! unsigned Phys = VRM.getPhys(VirtReg); - PhysRegsUsed[Phys] = true; + MF.setPhysRegUsed(Phys); if (MO.isDef()) ReusedOperands.markClobbered(Phys); MI.getOperand(i).setReg(Phys); @@ -842,10 +840,8 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, continue; } - const TargetRegisterClass* RC = - MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); - - PhysRegsUsed[DesignatedReg] = true; + const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg); + MF.setPhysRegUsed(DesignatedReg); ReusedOperands.markClobbered(DesignatedReg); MRI->copyRegToReg(MBB, &MI, DesignatedReg, PhysReg, RC); @@ -883,8 +879,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, // Otherwise, reload it and remember that we have it. PhysReg = VRM.getPhys(VirtReg); assert(PhysReg && "Must map virtreg to physreg!"); - const TargetRegisterClass* RC = - MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); + const TargetRegisterClass* RC = MF.getSSARegMap()->getRegClass(VirtReg); // Note that, if we reused a register for a previous operand, the // register we want to reload into might not actually be @@ -894,7 +889,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, PhysReg = ReusedOperands.GetRegForReload(PhysReg, &MI, Spills, MaybeDeadStores); - PhysRegsUsed[PhysReg] = true; + MF.setPhysRegUsed(PhysReg); ReusedOperands.markClobbered(PhysReg); if (doReMat) { MRI->reMaterialize(MBB, &MI, PhysReg, VRM.getReMaterializedMI(VirtReg)); @@ -947,7 +942,6 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, MachineInstr *SSMI = NULL; if (unsigned InReg = Spills.getSpillSlotPhysReg(SS, SSMI)) { DOUT << "Promoted Load To Copy: " << MI; - MachineFunction &MF = *MBB.getParent(); if (DestReg != InReg) { MRI->copyRegToReg(MBB, &MI, DestReg, InReg, MF.getSSARegMap()->getRegClass(VirtReg)); @@ -1081,8 +1075,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, // The only vregs left are stack slot definitions. int StackSlot = VRM.getStackSlot(VirtReg); - const TargetRegisterClass *RC = - MBB.getParent()->getSSARegMap()->getRegClass(VirtReg); + const TargetRegisterClass *RC = MF.getSSARegMap()->getRegClass(VirtReg); // If this def is part of a two-address operand, make sure to execute // the store from the correct physical register. @@ -1100,7 +1093,7 @@ void LocalSpiller::RewriteMBB(MachineBasicBlock &MBB, VirtRegMap &VRM, } } - PhysRegsUsed[PhysReg] = true; + MF.setPhysRegUsed(PhysReg); ReusedOperands.markClobbered(PhysReg); MRI->storeRegToStackSlot(MBB, next(MII), PhysReg, StackSlot, RC); DOUT << "Store:\t" << *next(MII); diff --git a/lib/Target/ARM/ARMRegisterInfo.cpp b/lib/Target/ARM/ARMRegisterInfo.cpp index 8177c806c23..96c6d385f1b 100644 --- a/lib/Target/ARM/ARMRegisterInfo.cpp +++ b/lib/Target/ARM/ARMRegisterInfo.cpp @@ -350,9 +350,6 @@ BitVector ARMRegisterInfo::getReservedRegs(const MachineFunction &MF) const { // Some targets reserve R9. if (STI.isR9Reserved()) Reserved.set(ARM::R9); - // At PEI time, if LR is used, it will be spilled upon entry. - if (MF.getUsedPhysregs() && !MF.isPhysRegUsed((unsigned)ARM::LR)) - Reserved.set(ARM::LR); return Reserved; } @@ -1094,7 +1091,7 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // If LR is not spilled, but at least one of R4, R5, R6, and R7 is spilled. // Spill LR as well so we can fold BX_RET to the registers restore (LDM). if (!LRSpilled && CS1Spilled) { - MF.changePhyRegUsed(ARM::LR, true); + MF.setPhysRegUsed(ARM::LR); AFI->setCSRegisterIsSpilled(ARM::LR); NumGPRSpills++; UnspilledCS1GPRs.erase(std::find(UnspilledCS1GPRs.begin(), @@ -1106,7 +1103,7 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, // Darwin ABI requires FP to point to the stack slot that contains the // previous FP. if (STI.isTargetDarwin() || hasFP(MF)) { - MF.changePhyRegUsed(FramePtr, true); + MF.setPhysRegUsed(FramePtr); NumGPRSpills++; } @@ -1117,13 +1114,13 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, if (TargetAlign == 8 && (NumGPRSpills & 1)) { if (CS1Spilled && !UnspilledCS1GPRs.empty()) { unsigned Reg = UnspilledCS1GPRs.front(); - MF.changePhyRegUsed(Reg, true); + MF.setPhysRegUsed(Reg); AFI->setCSRegisterIsSpilled(Reg); if (!isReservedReg(MF, Reg)) ExtraCSSpill = true; } else if (!UnspilledCS2GPRs.empty()) { unsigned Reg = UnspilledCS2GPRs.front(); - MF.changePhyRegUsed(Reg, true); + MF.setPhysRegUsed(Reg); AFI->setCSRegisterIsSpilled(Reg); if (!isReservedReg(MF, Reg)) ExtraCSSpill = true; @@ -1178,7 +1175,7 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, } if (Extras.size() && NumExtras == 0) { for (unsigned i = 0, e = Extras.size(); i != e; ++i) { - MF.changePhyRegUsed(Extras[i], true); + MF.setPhysRegUsed(Extras[i]); AFI->setCSRegisterIsSpilled(Extras[i]); } } else { @@ -1192,7 +1189,7 @@ ARMRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, } if (ForceLRSpill) { - MF.changePhyRegUsed(ARM::LR, true); + MF.setPhysRegUsed(ARM::LR); AFI->setCSRegisterIsSpilled(ARM::LR); AFI->setLRIsSpilledForFarJump(true); } diff --git a/lib/Target/PowerPC/PPCRegisterInfo.cpp b/lib/Target/PowerPC/PPCRegisterInfo.cpp index dbf2cf48b15..89fa90b7d79 100644 --- a/lib/Target/PowerPC/PPCRegisterInfo.cpp +++ b/lib/Target/PowerPC/PPCRegisterInfo.cpp @@ -739,16 +739,16 @@ static void RemoveVRSaveCode(MachineInstr *MI) { // HandleVRSaveUpdate - MI is the UPDATE_VRSAVE instruction introduced by the // instruction selector. Based on the vector registers that have been used, // transform this into the appropriate ORI instruction. -static void HandleVRSaveUpdate(MachineInstr *MI, const bool *UsedRegs, - const TargetInstrInfo &TII) { +static void HandleVRSaveUpdate(MachineInstr *MI, const TargetInstrInfo &TII) { + MachineFunction *MF = MI->getParent()->getParent(); + unsigned UsedRegMask = 0; for (unsigned i = 0; i != 32; ++i) - if (UsedRegs[VRRegNo[i]]) + if (MF->isPhysRegUsed(VRRegNo[i])) UsedRegMask |= 1 << (31-i); // Live in and live out values already must be in the mask, so don't bother // marking them. - MachineFunction *MF = MI->getParent()->getParent(); for (MachineFunction::livein_iterator I = MF->livein_begin(), E = MF->livein_end(); I != E; ++I) { unsigned RegNo = PPCRegisterInfo::getRegisterNumbering(I->first); @@ -846,8 +846,7 @@ void PPCRegisterInfo::processFunctionBeforeCalleeSavedScan(MachineFunction &MF, PPCFunctionInfo *FI = MF.getInfo(); unsigned LR = getRARegister(); FI->setUsesLR(MF.isPhysRegUsed(LR)); - MF.changePhyRegUsed(LR, false); - + MF.setPhysRegUnused(LR); // Save R31 if necessary int FPSI = FI->getFramePointerSaveIndex(); @@ -883,7 +882,7 @@ void PPCRegisterInfo::emitPrologue(MachineFunction &MF) const { // process it. for (unsigned i = 0; MBBI != MBB.end(); ++i, ++MBBI) { if (MBBI->getOpcode() == PPC::UPDATE_VRSAVE) { - HandleVRSaveUpdate(MBBI, MF.getUsedPhysregs(), TII); + HandleVRSaveUpdate(MBBI, TII); break; } } diff --git a/lib/Target/X86/X86FloatingPoint.cpp b/lib/Target/X86/X86FloatingPoint.cpp index 7bed30364fb..2439d19234c 100644 --- a/lib/Target/X86/X86FloatingPoint.cpp +++ b/lib/Target/X86/X86FloatingPoint.cpp @@ -161,12 +161,11 @@ FunctionPass *llvm::createX86FloatingPointStackifierPass() { return new FPS(); } bool FPS::runOnMachineFunction(MachineFunction &MF) { // We only need to run this pass if there are any FP registers used in this // function. If it is all integer, there is nothing for us to do! - const bool *PhysRegsUsed = MF.getUsedPhysregs(); bool FPIsUsed = false; assert(X86::FP6 == X86::FP0+6 && "Register enums aren't sorted right!"); for (unsigned i = 0; i <= 6; ++i) - if (PhysRegsUsed[X86::FP0+i]) { + if (MF.isPhysRegUsed(X86::FP0+i)) { FPIsUsed = true; break; }