diff --git a/include/llvm/Transforms/Utils/PromoteMemToReg.h b/include/llvm/Transforms/Utils/PromoteMemToReg.h index 22f46e5fc96..2f28f3333f9 100644 --- a/include/llvm/Transforms/Utils/PromoteMemToReg.h +++ b/include/llvm/Transforms/Utils/PromoteMemToReg.h @@ -20,6 +20,7 @@ namespace llvm { class AllocaInst; +class DataLayout; class DominatorTree; class AliasSetTracker; @@ -29,7 +30,7 @@ class AliasSetTracker; /// (transitively) using this alloca. This also enforces that there is only /// ever one layer of bitcasts or GEPs between the alloca and the lifetime /// markers. -bool isAllocaPromotable(const AllocaInst *AI); +bool isAllocaPromotable(const AllocaInst *AI, const DataLayout *DL); /// \brief Promote the specified list of alloca instructions into scalar /// registers, inserting PHI nodes as appropriate. @@ -41,7 +42,7 @@ bool isAllocaPromotable(const AllocaInst *AI); /// If AST is specified, the specified tracker is updated to reflect changes /// made to the IR. void PromoteMemToReg(ArrayRef Allocas, DominatorTree &DT, - AliasSetTracker *AST = 0); + const DataLayout *DL, AliasSetTracker *AST = 0); } // End llvm namespace diff --git a/lib/Transforms/Scalar/SROA.cpp b/lib/Transforms/Scalar/SROA.cpp index 5afd83008a0..1525caa868b 100644 --- a/lib/Transforms/Scalar/SROA.cpp +++ b/lib/Transforms/Scalar/SROA.cpp @@ -3376,7 +3376,7 @@ bool SROA::promoteAllocas(Function &F) { if (DT && !ForceSSAUpdater) { DEBUG(dbgs() << "Promoting allocas with mem2reg...\n"); - PromoteMemToReg(PromotableAllocas, *DT); + PromoteMemToReg(PromotableAllocas, *DT, DL); PromotableAllocas.clear(); return true; } diff --git a/lib/Transforms/Scalar/ScalarReplAggregates.cpp b/lib/Transforms/Scalar/ScalarReplAggregates.cpp index 33bbe151630..73b2edfac2c 100644 --- a/lib/Transforms/Scalar/ScalarReplAggregates.cpp +++ b/lib/Transforms/Scalar/ScalarReplAggregates.cpp @@ -1426,7 +1426,7 @@ bool SROA::performPromotion(Function &F) { if (Allocas.empty()) break; if (HasDomTree) - PromoteMemToReg(Allocas, *DT); + PromoteMemToReg(Allocas, *DT, TD); else { SSAUpdater SSA; for (unsigned i = 0, e = Allocas.size(); i != e; ++i) { diff --git a/lib/Transforms/Utils/Mem2Reg.cpp b/lib/Transforms/Utils/Mem2Reg.cpp index 61b3965d8f1..ebd7db6210c 100644 --- a/lib/Transforms/Utils/Mem2Reg.cpp +++ b/lib/Transforms/Utils/Mem2Reg.cpp @@ -16,6 +16,7 @@ #include "llvm/Transforms/Scalar.h" #include "llvm/ADT/Statistic.h" #include "llvm/Analysis/Dominators.h" +#include "llvm/IR/DataLayout.h" #include "llvm/IR/Function.h" #include "llvm/IR/Instructions.h" #include "llvm/Transforms/Utils/PromoteMemToReg.h" @@ -27,6 +28,7 @@ STATISTIC(NumPromoted, "Number of alloca's promoted"); namespace { struct PromotePass : public FunctionPass { static char ID; // Pass identification, replacement for typeid + PromotePass() : FunctionPass(ID) { initializePromotePassPass(*PassRegistry::getPassRegistry()); } @@ -62,6 +64,7 @@ bool PromotePass::runOnFunction(Function &F) { bool Changed = false; DominatorTree &DT = getAnalysis(); + const DataLayout *DL = getAnalysisIfAvailable(); while (1) { Allocas.clear(); @@ -70,12 +73,12 @@ bool PromotePass::runOnFunction(Function &F) { // the entry node for (BasicBlock::iterator I = BB.begin(), E = --BB.end(); I != E; ++I) if (AllocaInst *AI = dyn_cast(I)) // Is it an alloca? - if (isAllocaPromotable(AI)) + if (isAllocaPromotable(AI, DL)) Allocas.push_back(AI); if (Allocas.empty()) break; - PromoteMemToReg(Allocas, DT); + PromoteMemToReg(Allocas, DT, DL); NumPromoted += Allocas.size(); Changed = true; } diff --git a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp index b3eaa1319af..69101809970 100644 --- a/lib/Transforms/Utils/PromoteMemoryToRegister.cpp +++ b/lib/Transforms/Utils/PromoteMemoryToRegister.cpp @@ -61,6 +61,8 @@ STATISTIC(NumPHIInsert, "Number of PHI nodes inserted"); namespace { struct AllocaInfo : private InstVisitor { + const DataLayout *DL; + SmallVector DefiningBlocks; SmallVector UsingBlocks; SmallVector DeadInsts; @@ -73,6 +75,8 @@ struct AllocaInfo : private InstVisitor { Value *AllocaPointerVal; DbgDeclareInst *DbgDeclare; + AllocaInfo(const DataLayout *DL) : DL(DL) {} + void clear() { DefiningBlocks.clear(); UsingBlocks.clear(); @@ -274,6 +278,7 @@ struct PromoteMem2Reg { std::vector Allocas; DominatorTree &DT; DIBuilder DIB; + const DataLayout *DL; /// An AliasSetTracker object to update. If null, don't update it. AliasSetTracker *AST; @@ -319,9 +324,9 @@ struct PromoteMem2Reg { public: PromoteMem2Reg(ArrayRef Allocas, DominatorTree &DT, - AliasSetTracker *AST) + const DataLayout *DL, AliasSetTracker *AST) : Allocas(Allocas.begin(), Allocas.end()), DT(DT), - DIB(*DT.getRoot()->getParent()->getParent()), AST(AST) {} + DIB(*DT.getRoot()->getParent()->getParent()), DL(DL), AST(AST) {} void run(); @@ -585,7 +590,7 @@ void PromoteMem2Reg::run() { PointerAllocaValues.resize(Allocas.size()); AllocaDbgDeclares.resize(Allocas.size()); - AllocaInfo Info; + AllocaInfo Info(DL); LargeBlockInfo LBI; for (unsigned AllocaNum = 0; AllocaNum != Allocas.size(); ++AllocaNum) { @@ -1140,19 +1145,19 @@ NextIteration: goto NextIteration; } -bool llvm::isAllocaPromotable(const AllocaInst *AI) { +bool llvm::isAllocaPromotable(const AllocaInst *AI, const DataLayout *DL) { // We cast away constness because we re-use the non-const analysis that the // actual promotion routine uses. While it is non-const, it doesn't actually // mutate anything at this phase, and we discard the non-const results that // promotion uses to mutate the alloca. - return AllocaInfo().analyzeAlloca(*const_cast(AI)); + return AllocaInfo(DL).analyzeAlloca(*const_cast(AI)); } -void llvm::PromoteMemToReg(ArrayRef Allocas, - DominatorTree &DT, AliasSetTracker *AST) { +void llvm::PromoteMemToReg(ArrayRef Allocas, DominatorTree &DT, + const DataLayout *DL, AliasSetTracker *AST) { // If there is nothing to do, bail out... if (Allocas.empty()) return; - PromoteMem2Reg(Allocas, DT, AST).run(); + PromoteMem2Reg(Allocas, DT, DL, AST).run(); }