mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2025-01-15 23:31:37 +00:00
Improve the comment from r185794 (re: PromoteIntRes_BUILD_VECTOR)
In response to Duncan's review, I believe that the original comment was not as clear as it could be. Hopefully, this is better. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185824 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
parent
12ae7fd2da
commit
6c75160b87
@ -2931,8 +2931,10 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BUILD_VECTOR(SDNode *N) {
|
||||
Ops.reserve(NumElems);
|
||||
for (unsigned i = 0; i != NumElems; ++i) {
|
||||
SDValue Op;
|
||||
// It is possible for the operands to be larger than the result, for example,
|
||||
// when the operands are promoted booleans and the result was an i1 vector.
|
||||
// BUILD_VECTOR integer operand types are allowed to be larger than the
|
||||
// result's element type. This may still be true after the promotion. For
|
||||
// example, we might be promoting (<v?i1> = BV <i32>, <i32>, ...) to
|
||||
// (v?i16 = BV <i32>, <i32>, ...), and we can't any_extend <i32> to <i16>.
|
||||
if (N->getOperand(i).getValueType().bitsLT(NOutVTElem))
|
||||
Op = DAG.getNode(ISD::ANY_EXTEND, dl, NOutVTElem, N->getOperand(i));
|
||||
else
|
||||
|
Loading…
x
Reference in New Issue
Block a user