Allow itineraries to be passed through the Target Machine.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@24139 91177308-0d34-0410-b5e6-96231b3b80d8
This commit is contained in:
Jim Laskey
2005-11-01 20:06:59 +00:00
parent cb366d980a
commit 6cee630070
10 changed files with 119 additions and 22 deletions

View File

@@ -247,7 +247,7 @@ void InstrInfoEmitter::GatherItinClasses() {
for (unsigned i = 0, N = DefList.size(); i < N; i++) {
Record *Def = DefList[i];
ItinClassMap[Def->getName()] = i + 1;
ItinClassMap[Def->getName()] = i;
}
}

View File

@@ -178,8 +178,8 @@ void SubtargetEmitter::CPUKeyValues(std::ostream &OS) {
// CollectAllItinClasses - Gathers and enumerates all the itinerary classes.
// Returns itinerary class count.
//
unsigned SubtargetEmitter::CollectAllItinClasses(std::map<std::string, unsigned>
&ItinClassesMap) {
unsigned SubtargetEmitter::CollectAllItinClasses(std::ostream &OS,
std::map<std::string, unsigned> &ItinClassesMap) {
// Gather and sort all itinerary classes
std::vector<Record*> ItinClassList =
Records.getAllDerivedDefinitions("InstrItinClass");
@@ -196,6 +196,11 @@ unsigned SubtargetEmitter::CollectAllItinClasses(std::map<std::string, unsigned>
ItinClassesMap[Name] = i;
}
// Emit size of table
OS<<"\nenum {\n";
OS<<" ItinClassesSize = " << N << "\n";
OS<<"};\n";
// Return itinerary class count
return N;
}
@@ -313,6 +318,11 @@ void SubtargetEmitter::EmitStageData(std::ostream &OS,
// End stages table
OS << "};\n";
// Emit size of table
OS<<"\nenum {\n";
OS<<" StagesSize = sizeof(Stages)/sizeof(llvm::InstrStage)\n";
OS<<"};\n";
}
//
@@ -421,13 +431,18 @@ void SubtargetEmitter::EmitData(std::ostream &OS) {
std::vector<std::vector<InstrItinerary> > ProcList;
// Enumerate all the itinerary classes
unsigned NItinClasses = CollectAllItinClasses(ItinClassesMap);
// Emit the stage data
EmitStageData(OS, NItinClasses, ItinClassesMap, ProcList);
// Emit the processor itinerary data
EmitProcessorData(OS, ProcList);
// Emit the processor lookup data
EmitProcessorLookup(OS);
unsigned NItinClasses = CollectAllItinClasses(OS, ItinClassesMap);
// Make sure the rest is worth the effort
HasItineraries = NItinClasses != 0;
if (HasItineraries) {
// Emit the stage data
EmitStageData(OS, NItinClasses, ItinClassesMap, ProcList);
// Emit the processor itinerary data
EmitProcessorData(OS, ProcList);
// Emit the processor lookup data
EmitProcessorLookup(OS);
}
}
//
@@ -460,9 +475,15 @@ void SubtargetEmitter::ParseFeaturesFunction(std::ostream &OS) {
OS << " " << Attribute << " = (Bits & " << Instance << ") != 0;\n";
}
OS << "\n"
<< " InstrItinerary *Itin = (InstrItinerary *)"
"Features.getInfo(SubTypeInfoKV, SubTypeInfoKVSize);\n";
if (HasItineraries) {
OS << "\n"
<< " InstrItinerary *Itinerary = (InstrItinerary *)"
"Features.getInfo(SubTypeInfoKV, SubTypeInfoKVSize);\n"
" InstrItins = InstrItineraryData(Stages, StagesSize, "
"Itinerary, ItinClassesSize);\n";
}
OS << "}\n";
}

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@@ -27,12 +27,13 @@ class SubtargetEmitter : public TableGenBackend {
RecordKeeper &Records;
std::string Target;
bool HasItineraries;
void Enumeration(std::ostream &OS, const char *ClassName, bool isBits);
void FeatureKeyValues(std::ostream &OS);
void CPUKeyValues(std::ostream &OS);
unsigned CollectAllItinClasses(std::map<std::string, unsigned>
&ItinClassesMap);
unsigned CollectAllItinClasses(std::ostream &OS,
std::map<std::string, unsigned> &ItinClassesMap);
void FormItineraryString(Record *ItinData, std::string &ItinString,
unsigned &NStages);
void EmitStageData(std::ostream &OS, unsigned NItinClasses,
@@ -45,7 +46,7 @@ class SubtargetEmitter : public TableGenBackend {
void ParseFeaturesFunction(std::ostream &OS);
public:
SubtargetEmitter(RecordKeeper &R) : Records(R) {}
SubtargetEmitter(RecordKeeper &R) : Records(R), HasItineraries(false) {}
// run - Output the subtarget enumerations, returning true on failure.
void run(std::ostream &o);