From 6d3465793f45f4d40e24cabf1f5867cc6c0db90a Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Wed, 12 Jul 2006 16:59:49 +0000 Subject: [PATCH] Add information preventing several register class constraints from working. This implements PR828 and CodeGen/X86/2006-07-12-InlineAsmQConstraint.ll git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@29118 91177308-0d34-0410-b5e6-96231b3b80d8 --- lib/Target/X86/X86ISelLowering.cpp | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp index d96be87efde..4ebe4caad09 100644 --- a/lib/Target/X86/X86ISelLowering.cpp +++ b/lib/Target/X86/X86ISelLowering.cpp @@ -4140,7 +4140,15 @@ SDOperand X86TargetLowering::PerformDAGCombine(SDNode *N, X86TargetLowering::ConstraintType X86TargetLowering::getConstraintType(char ConstraintLetter) const { switch (ConstraintLetter) { - case 'A': return C_RegisterClass; + case 'A': + case 'r': + case 'R': + case 'l': + case 'q': + case 'Q': + case 'x': + case 'Y': + return C_RegisterClass; default: return TargetLowering::getConstraintType(ConstraintLetter); } }