diff --git a/test/CodeGen/Mips/2008-06-05-Carry.ll b/test/CodeGen/Mips/2008-06-05-Carry.ll
new file mode 100644
index 00000000000..c2c5e5eea07
--- /dev/null
+++ b/test/CodeGen/Mips/2008-06-05-Carry.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips -f -o %t
+; RUN: grep subu %t | count 2
+; RUN: grep addu %t | count 4
+
+target datalayout =
+"e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+
+define i64 @add64(i64 %u, i64 %v) nounwind  {
+entry:
+	%tmp2 = add i64 %u, %v	
+  ret i64 %tmp2
+}
+
+define i64 @sub64(i64 %u, i64 %v) nounwind  {
+entry:
+  %tmp2 = sub i64 %u, %v
+  ret i64 %tmp2
+}
diff --git a/test/CodeGen/Mips/2008-07-03-SRet.ll b/test/CodeGen/Mips/2008-07-03-SRet.ll
new file mode 100644
index 00000000000..b2813f2e673
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-03-SRet.ll
@@ -0,0 +1,18 @@
+; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips |  \
+; RUN:    grep {sw.*(\$4)} | count 3
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+	%struct.sret0 = type { i32, i32, i32 }
+
+define void @test0(%struct.sret0* noalias sret %agg.result, i32 %dummy) nounwind {
+entry:
+	getelementptr %struct.sret0* %agg.result, i32 0, i32 0		; <i32*>:0 [#uses=1]
+	store i32 %dummy, i32* %0, align 4
+	getelementptr %struct.sret0* %agg.result, i32 0, i32 1		; <i32*>:1 [#uses=1]
+	store i32 %dummy, i32* %1, align 4
+	getelementptr %struct.sret0* %agg.result, i32 0, i32 2		; <i32*>:2 [#uses=1]
+	store i32 %dummy, i32* %2, align 4
+	ret void
+}
+
diff --git a/test/CodeGen/Mips/2008-07-05-ByVal.ll b/test/CodeGen/Mips/2008-07-05-ByVal.ll
new file mode 100644
index 00000000000..6e14b784da8
--- /dev/null
+++ b/test/CodeGen/Mips/2008-07-05-ByVal.ll
@@ -0,0 +1,19 @@
+; RUN: llvm-as < %s | llc -enable-legalize-types -march=mips |  \
+; RUN:    grep {lw.*(\$4)} | count 2
+
+target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
+target triple = "mipsallegrexel-psp-elf"
+	%struct.byval0 = type { i32, i32 }
+
+define i64 @test0(%struct.byval0* byval  %b, i64 %sum) nounwind  {
+entry:
+	getelementptr %struct.byval0* %b, i32 0, i32 0		; <i32*>:0 [#uses=1]
+	load i32* %0, align 4		; <i32>:1 [#uses=1]
+	getelementptr %struct.byval0* %b, i32 0, i32 1		; <i32*>:2 [#uses=1]
+	load i32* %2, align 4		; <i32>:3 [#uses=1]
+	add i32 %3, %1		; <i32>:4 [#uses=1]
+	sext i32 %4 to i64		; <i64>:5 [#uses=1]
+	add i64 %5, %sum		; <i64>:6 [#uses=1]
+	ret i64 %6
+}
+
diff --git a/test/CodeGen/Mips/dg.exp b/test/CodeGen/Mips/dg.exp
new file mode 100644
index 00000000000..adb2cac9a6b
--- /dev/null
+++ b/test/CodeGen/Mips/dg.exp
@@ -0,0 +1,5 @@
+load_lib llvm.exp
+
+if { [llvm_supports_target Mips] } {
+  RunLLVMTests [lsort [glob -nocomplain $srcdir/$subdir/*.{ll,c,cpp}]]
+}